peridot: Switch to AOSP NXP NFC service

Change-Id: Ic32be640b504bb2ddf52931cdd48d57f85726f26
This commit is contained in:
AdarshGrewal
2025-09-18 22:27:10 +05:30
parent fd17e08669
commit 4c07bddfe7
42 changed files with 4 additions and 7096 deletions

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# ----------------------------------------------
# Test name: SN1X0_SPC
# Description: runs SPC
# Revision: 2.00
# Date: 27/07/2020
# Tool rev: 1.12 or later
# ----------------------------------------------
version
interval 200
reset 1
#// NCI CORE RESET CMD
send 20000100
receive
#// NCI CORE INIT CMD
send 2001020000
#// NCI CORE SETCONFIG CMD:
send 20020401850101
#// NCI SYSTEM ENABLE PROPRIETARY CMD
send 2F0200
#// READ OFFSET BEFORE SPC
send 20030301A017
#//SET Normal Polling
send 20022E01A0682A064060031900000000030400C009C00900010001A000A00003FA0000004C0014007D00057F0000010003
#// SET SPC 1RST STEP (SPC CALIBRATION)
send 2F3D0F3000C832192900000000320000121F
#// COPY SPC CMD (2F3D0F3XXXXX) HERE
#//send 2F3D0F3000E02E3251760A28A27D0000121F
#//send 2F3D0F3000C8320A6504029C867D0000121F
#// send 2F3D0XXXXXXXXXXX
#// SPC CMD [PLL sweep] input clock 19.2MHz
send 2F3D7E3001C08C0466C08C0366C08C0266C08C0166C08C0066008D0466008D0366008D0266008D0166008D0066408D0466408D0366408D0266408D0166408D0066808D0466808D0366808D0266808D0166808D0066C08D0466C08D0366C08D0266C08D0166C08D0066008E0466008E0366008E0266008E0166008E0066408E0466
sleep 100
send 2F3D7E3002408E0366408E0266408E0166408E0066808E0466808E0366808E0266808E0166808E0066C08E0466C08E0366C08E0266C08E0166C08E0066008F0466008F0366008F0266008F0166008F0066408F0466408F0366408F0266408F0166408F0066808F0466808F0366808F0266808F0166808F0066C08F0466C08F0366
sleep 100
send 2F3D4E3003C08F0266C08F0166C08F0066009004660090036600900266009001660090006640900466409003664090026640900166409000668090046680900366809002668090016680900066C0900466
sleep 100
#// SPC CMD [PLL sweep] input clock 26MHz
#//send 2F3D7E300142A5046642A5016682A5036682A50066C2A5026602A6046602A6016642A6036642A6006682A60266C2A60466C2A6016602A7036602A7006642A7026682A7046682A70166C2A70366C2A7006602A8026642A8046642A8016682A8036682A80066C2A8026602A9046602A9016642A9036642A9006682A90266C2A90466
#//sleep 100
#//send 2F3D7E3002C2A9016602AA036602AA006642AA026682AA046682AA0166C2AA0366C2AA006602AB026642AB046642AB016682AB036682AB0066C2AB026602AC046602AC016642AC036642AC006682AC0266C2AC0466C2AC016602AD036602AD006642AD026682AD046682AD0166C2AD0366C2AD006602AE026642AE046642AE0166
#//sleep 100
#//send 2F3D4E300382AE036682AE0066C2AE026602AF046602AF016642AF036642AF006682AF0266C2AF0466C2AF016602B0036602B0006642B0026682B0046682B00166C2B00366C2B0006602B1026642B10466
#//sleep 100
#// SPC CMD [PLL sweep] input clock 27.12MHz
#//send 2F3D7E300142A3006682A30266C2A30466C2A3016602A4036602A4006642A4026682A4046682A40166C2A40366C2A4006602A5026642A5046642A5016682A5036682A50066C2A5026602A6046602A6016642A6036642A6006682A60266C2A60466C2A6016602A7036602A7006642A7026682A7046682A70166C2A70366C2A70066
#//sleep 100
#//send 2F3D7E300202A8026642A8046642A8016682A8036682A80066C2A8026602A9046602A9016642A9036642A9006682A90266C2A90466C2A9016602AA036602AA006642AA026682AA046682AA0166C2AA0366C2AA006602AB026642AB046642AB016682AB036682AB0066C2AB026602AC046602AC016642AC036642AC006682AC0266
#//sleep 100
#//send 2F3D4E3003C2AC0466C2AC016602AD036602AD006642AD026682AD046682AD0166C2AD0366C2AD006602AE026642AE046642AE016682AE036682AE0066C2AE026602AF046602AF016642AF036642AF0066
#//sleep 100
#// SPC CMD [PLL sweep] input clock 38.4MHz
#//send 2F3D7E3001C18C0466C18C0366C18C0266C18C0166C18C0066018D0466018D0366018D0266018D0166018D0066418D0466418D0366418D0266418D0166418D0066818D0466818D0366818D0266818D0166818D0066C18D0466C18D0366C18D0266C18D0166C18D0066018E0466018E0366018E0266018E0166018E0066418E0466
#//sleep 100
#//send 2F3D7E3002418E0366418E0266418E0166418E0066818E0466818E0366818E0266818E0166818E0066C18E0466C18E0366C18E0266C18E0166C18E0066018F0466018F0366018F0266018F0166018F0066418F0466418F0366418F0266418F0166418F0066818F0466818F0366818F0266818F0166818F0066C18F0466C18F0366
#//sleep 100
#//send 2F3D4E3003C18F0266C18F0166C18F0066019004660190036601900266019001660190006641900466419003664190026641900166419000668190046681900366819002668190016681900066C1900466
#//sleep 100
#// SPC START
send 2F3D0131
trigger 6F3D07
#//SET LPCD
send 20022E01A0682A064060031900000000820400C005C00900010001A000A00003FA0000004C0014007D00057F0000010003
#// READ OFFSET AFTER SPC
send 20030301A017

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#MIUI MOD: NFC_TransitConfig
service vendor.nfc_hal_service /vendor/bin/hw/android.hardware.nqnfc-service.nxp
class hal
user nfc
group nfc oem_2912
#END NFC_TransitConfig

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#################### This file is used by NXP NFC NCI HAL #####################
###############################################################################
# Application options
# Logging Levels
# NXPLOG_DEFAULT_LOGLEVEL 0x01
# ANDROID_LOG_DEBUG 0x04
# ANDROID_LOG_INFO 0x03
# ANDROID_LOG_WARN 0x02
# ANDROID_LOG_ERROR 0x01
# ANDROID_LOG_SILENT 0x00
NXPLOG_EXTNS_LOGLEVEL=0x04
NXPLOG_NCIHAL_LOGLEVEL=0x04
NXPLOG_NCIX_LOGLEVEL=0x04
NXPLOG_NCIR_LOGLEVEL=0x04
NXPLOG_FWDNLD_LOGLEVEL=0x04
NXPLOG_TML_LOGLEVEL=0x04
NFC_DEBUG_ENABLED=1
###############################################################################
# Nfc Device Node name
NXP_NFC_DEV_NODE="/dev/nq-nci"
#################################################################################
#VEN Toggle Config
#Disable = 0x00
#Enable = 0x01
ENABLE_VEN_TOGGLE=0x00
###############################################################################
# Extension for Mifare reader enable
MIFARE_READER_ENABLE=0x01
###############################################################################
# Mifare Reader implementation
# 0: General implementation
# 1: Legacy implementation
LEGACY_MIFARE_READER=0
###############################################################################
# System clock source selection configuration
#define CLK_SRC_XTAL 1
#define CLK_SRC_PLL 2
NXP_SYS_CLK_SRC_SEL=0x02
###############################################################################
# System clock frequency selection configuration
#define CLK_FREQ_13MHZ 1
#define CLK_FREQ_19_2MHZ 2
#define CLK_FREQ_24MHZ 3
#define CLK_FREQ_26MHZ 4
#define CLK_FREQ_38_4MHZ 5
#define CLK_FREQ_52MHZ 6
NXP_SYS_CLK_FREQ_SEL=0x02
###############################################################################
# The timeout value to be used for clock request acknowledgment
# min value = 0x01 to max = 0x06
#NXP_SYS_CLOCK_TO_CFG=0x06
###############################################################################
# The delay to try to start PLL/XTAL when using sys clock 256/fc units = ~18.8 us
# min value = 0x01 to max = 0x1F
#NXP_CLOCK_REQ_DELAY=0x16
###############################################################################
# NXP proprietary settings
NXP_ACT_PROP_EXTN={2F, 02, 00}
###############################################################################
# NXP TVDD configurations settings
# Allow NFCC to configure External TVDD, two configurations (1 and 2) supported,
# out of them only one can be configured at a time.
#NXP_EXT_TVDD_CFG=0x02
###############################################################################
#config1:SLALM, 3.3V for both RM and CM
#NXP_EXT_TVDD_CFG_1={20, 02, 0F, 01, A0, 0E, 0B, 31, 01, 01, 31, 00, 00, 00, 01, 00, D0, 0C}
###############################################################################
#config2: use DCDC in CE, use Tx_Pwr_Req, set CFG2 mode, SLALM,
#monitoring 5V from DCDC, 3.3V for both RM and CM, DCDCWaitTime=4.2ms
#NXP_EXT_TVDD_CFG_2={20, 02, 0F, 01, A0, 0E, 0B, 11, 01, C2, B2, 00, B2, 1E, 1F, 00, D0, 0C}
#NXP_EXT_TVDD_CFG_2={20, 02, 30, 01, A0, 0E, 2C, F0, 00, 3E, 11, E4, E4, E4, 00, 00, 00, 00, 00, A7, 8E, FF, FF, 0F, 0F, 0F, 0F, 0A, 00, 00, 00, 00, 02, 00, 00, 01, 00, 10, 00, 04, 00, 00, 00, 17, 40, 20, 07, 13, 07, 05, 13}
###############################################################################
# Core configuration rf field filter settings to enable set to 01 to disable set
# to 00 last bit
#NXP_CORE_RF_FIELD={ 20, 02, 05, 01, A0, 62, 01, 00 }
###############################################################################
# To enable i2c fragmentation set i2c fragmentation enable 0x01 to disable set
# to 0x00
#NXP_I2C_FRAGMENTATION_ENABLED=0x00
###############################################################################
#set autonomous mode
# disable autonomous 0x00
# enable autonomous 0x01
NXP_AUTONOMOUS_ENABLE=0x00
###############################################################################
#set Guard Timer
# Gurad Timer range to 0x0F-0xFF(i.e.15-255 seconds)
NXP_GUARD_TIMER_VALUE=0x0F
###############################################################################
#Enable SWP full power mode when phone is power off
#NXP_SWP_FULL_PWR_ON=0x00
################################################################################
#This is used to configure UICC2 at boot time.
# UICC2 0x03
NXP_DEFAULT_UICC2_SELECT=0x03
###############################################################################
# CE when Screen state is locked
# This setting is for DEFAULT_AID_ROUTE,
# DEFAULT_DESFIRE_ROUTE and DEFAULT_MIFARE_CLT_ROUTE
# Disable 0x00
# Enable 0x01
NXP_CE_ROUTE_STRICT_DISABLE=0x01
###############################################################################
#SCR Read Tag Operation Timeout in secs
NXP_SWP_RD_TAG_OP_TIMEOUT=20
###############################################################################
#Set the default AID route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_AID_ROUTE=0x01
###############################################################################
#Set the ISODEP (Mifare Desfire) route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_ISODEP_ROUTE=0x01
###############################################################################
#Set the Mifare CLT route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_MIFARE_CLT_ROUTE=0x01
###############################################################################
#Set the Felica CLT route Location :
#This settings will be used when application does not set this parameter
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_FELICA_CLT_ROUTE=0x01
###############################################################################
#Set the default AID Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_AID_PWR_STATE=0x39
###############################################################################
#Set the Mifare Desfire Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_DESFIRE_PWR_STATE=0x3B
###############################################################################
#Set the Mifare CLT Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_MIFARE_CLT_PWR_STATE=0x3B
###############################################################################
#Set the Felica CLT Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_FELICA_CLT_PWR_STATE=0x3B
###############################################################################
#Set the T4TNfcee AID Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_T4TNFCEE_AID_POWER_STATE=0x3B
###############################################################################
#Set the default Felica T3T System Code OffHost route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_SYS_CODE_ROUTE=0x00
###############################################################################
# AID Matching platform options
# AID_MATCHING_L 0x01
# AID_MATCHING_K 0x02
#AID_MATCHING_PLATFORM=0x01
###############################################################################
# P61 interface options
# SPI 0x02
NXP_P61_LS_DEFAULT_INTERFACE=0x00
###############################################################################
#CHINA_TIANJIN_RF_SETTING
#Enable 0x01
#Disable 0x00
#NXP_CHINA_TIANJIN_RF_ENABLED=0x01
###############################################################################
#SWP_SWITCH_TIMEOUT_SETTING
# Allowed range of swp timeout setting is 0x00 to 0x3C [0 - 60].
# Timeout in milliseconds, for example
# No Timeout 0x00
# 10 millisecond timeout 0x0A
#NXP_SWP_SWITCH_TIMEOUT=0x0A
###############################################################################
# Flashing Options Configurations
# FLASH_UPPER_VERSION 0x01
# FLASH_DIFFERENT_VERSION 0x02
# FLASH_ALWAYS 0x03
NXP_FLASH_CONFIG=0x02
###############################################################################
# P61 interface options for JCOP Download
# SPI 0x02
NXP_P61_JCOP_DEFAULT_INTERFACE=0x00
###############################################################################
# Option to perform LS update every boot
# Enable 0x01
# Disable 0x00
NXP_LS_FORCE_UPDATE_REQUIRED=0x00
###############################################################################
# Option to perform JCOP update every boot
# Enable 0x01
# Disable 0x00
NXP_JCOP_FORCE_UPDATE_REQUIRED=0x00
###############################################################################
# Bail out mode
# If set to 1, NFCC is using bail out mode for either Type A or Type B poll.
# Set this parameter value to 1 if Android Beam is enabled, else set to 0.
NFA_POLL_BAIL_OUT_MODE=0x00
###############################################################################
# White list of Hosts
# This values will be the Hosts(NFCEEs) in the HCI Network.
DEVICE_HOST_WHITE_LIST={C0, 80}
###############################################################################
# Choose the presence-check algorithm for type-4 tag. If not defined, the default value is 1.
# 0 NFA_RW_PRES_CHK_DEFAULT; Let stack selects an algorithm
# 1 NFA_RW_PRES_CHK_I_BLOCK; ISO-DEP protocol's empty I-block
# 2 NFA_RW_PRES_CHK_ISO_DEP_NAK; Type - 4 tag protocol iso-dep nak presence check
# command is sent waiting for rsp and ntf.
PRESENCE_CHECK_ALGORITHM=2
###############################################################################
# Options to Fallback to alternative route
# DH 0x01
# ESE 0x02
NXP_CHECK_DEFAULT_PROTO_SE_ID=0x01
###############################################################################
# Vendor Specific Proprietary Protocol & Discovery Configuration
# Set to 0xFF if unsupported
# byte[0] NCI_PROTOCOL_18092_ACTIVE
# byte[1] NCI_PROTOCOL_B_PRIME
# byte[2] NCI_PROTOCOL_DUAL
# byte[3] NCI_PROTOCOL_15693
# byte[4] NCI_PROTOCOL_KOVIO
# byte[5] NCI_PROTOCOL_MIFARE
# byte[6] NCI_DISCOVERY_TYPE_POLL_KOVIO
# byte[7] NCI_DISCOVERY_TYPE_POLL_B_PRIME
# byte[8] NCI_DISCOVERY_TYPE_LISTEN_B_PRIME
NFA_PROPRIETARY_CFG={05, FF, FF, 06, 81, 80, FF, FF, FF}
###############################################################################
#NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE
#Enable/Disable block number checks for china transit use case
#Enable 0x01
#Disable 0x00
#NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE=0x01
################################################################################
#This flags will enable different modes of Lx Debug based on bits of the Byte0
#Byte 0:
# |_________Bit Mask_______| Debug Mode
# b7|b6|b5|b4|b3|b2|b1|b0|
# | |x | | | | | | Modulation Detected Notification
# | | |X | | | | | Enable L1 Events (ISO14443-4, ISO18092)
# | | | |X | | | | Enable L2 Reader Events(ROW specific)
# | | | | |X | | | Enable Felica SystemCode
# | | | | | |X | | Enable Felica RF (all Felica CM events)
# | | | | | | |X | Enable L2 Events CE (ISO14443-3, RF Field ON/OFF)
#Byte 1:
# |_________Bit Mask_______| Debug Mode
# b7|b6|b5|b4|b3|b2|b1|b0|
# | |x | | | | | | Enable L2 events during RF activation ISO 14443-3
# | | | | | | | |
# | | | | | | | |
# | | | | | | | |
# | | | | | | | |
# | | | | | | | |
# Byte1 Byte0
# \__ __/
# e.g. NXP_CORE_PROP_SYSTEM_DEBUG=0x0031 ==> Modulation detected, L1, L2 CE
NXP_CORE_PROP_SYSTEM_DEBUG=0x0000
###############################################################################
#Enable NXP NCI runtime parser library
#Enable 0x01
#Disable 0x00
NXP_NCI_PARSER_LIBRARY=0x00
###############################################################################
# Timeout value in milliseconds for JCOP OS download to complete
OS_DOWNLOAD_TIMEOUT_VALUE=60000
###############################################################################
# Forcing HOST to listen for a selected protocol
# 0x00 : Disable Host Listen
# 0x01 : Enable Host to Listen (A) for ISO-DEP tech A
# 0x02 : Enable Host to Listen (B) for ISO-DEP tech B
# 0x04 : Enable Host to Listen (F) for T3T Tag Type Protocol tech F
# 0x07 : Enable Host to Listen (ABF)for ISO-DEP tech AB & T3T Tag Type Protocol tech F
HOST_LISTEN_TECH_MASK=0x07
###############################################################################
# Enable forward functionality
# Disable 0x00
# Enable 0x01 //Any positive value as per below bit configuration
# HOST power states when type A/B only UICC present
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
FORWARD_FUNCTIONALITY_ENABLE=0x01
###############################################################################
# Configure the NFC Extras to open and use a static pipe. If the value is
# not set or set to 0, then the default is use a dynamic pipe based on a
# destination gate (see NFA_HCI_DEFAULT_DEST_GATE). Note there is a value
# for each EE (ESE/SIM1/SIM2)
OFF_HOST_ESE_PIPE_ID=0x16
OFF_HOST_SIM_PIPE_ID=0x0A
OFF_HOST_SIM2_PIPE_ID=0x23
###############################################################################
#Set the Felica T3T System Code Power state :
#This settings will be used when application does not set this parameter
#Update Power state as per NCI2.0
DEFAULT_SYS_CODE_PWR_STATE=0x00
###############################################################################
#Default Secure Element route id
DEFAULT_OFFHOST_ROUTE=0x01
###############################################################################
#Maximum SMB transceive wait for response
NXP_SMB_TRANSCEIVE_TIMEOUT=2000
###############################################################################
# Firmware file type
#.so file 0x01
#.bin file 0x02
NXP_FW_TYPE=0x01
############################################################################
# Extended APDU length for ISO_DEP
ISO_DEP_MAX_TRANSCEIVE=0xFEFF
#########################################################################
# Support for Amendment I SEMS specification
# Support SEMS Amendment I 0x01
# Support NXP LS client 0x00
NXP_GP_AMD_I_SEMS_SUPPORTED=0x01
###############################################################################
#All eSE terminals shall be match with the /vendor/etc/vintf/manifest.xml file
#under android.hardware.secure_element.
# The terminal name shall start from 1
# Assign terminal number to each interface based on system config
NXP_SPI_SE_TERMINAL_NUM="eSE1"
###############################################################################
# Assign terminal number to each interface based on system config
#NXP_VISO_SE_TERMINAL_NUM="eSE3"
###############################################################################
# Assign terminal number to each interface based on system config
NXP_NFC_SE_TERMINAL_NUM="eSE2"
###############################################################################
#For static or dynamic dual UICC feature support
#Enable static dual uicc feature by setting value 0x00
#Enable dynamic dual uicc feature by setting value 0x01
NXP_DUAL_UICC_ENABLE=0x01
###############################################################################
# Time to wait by DH when NFCC will report eSE Cold Temp Error.
# The value is as per the UM and in seconds
NXP_SE_COLD_TEMP_ERROR_DELAY=0x05
###############################################################################
# Set configuration optimization decision setting
# Enable = 0x01
# Disable = 0x00
NXP_SET_CONFIG_ALWAYS=0x00
###############################################################################
#OffHost ESE route location for MultiSE
#ESE = 01
OFFHOST_ROUTE_ESE={01}
###############################################################################
#OffHost UICC route location for MultiSE
#UICC1 = 02
#UICC2 = 03
OFFHOST_ROUTE_UICC={02:03}
###############################################################################
#T4T NFCEE ENABLE
#bit pos 0 = T4T NFCEE Enable
#bit pos 6 = T4T NFCEE Contactless write enable
#bit pos 7 = Proprietary file enable
NXP_T4T_NFCEE_ENABLE=0x01
###############################################################################
#WLC mode
#0x00 = if WLC Application running in MW (non-autonomous mode)
#0x01 = if WLC Application running in FW (autonomous mode)
NXP_WLC_MODE=0x01
###############################################################################
#CORE_SET_CONF_CMD to reset Prop Emvco Flag
NXP_PROP_RESET_EMVCO_CMD={20, 02, 05, 01, A0, 44, 01, 00}
###############################################################################
#Guard time in ms for the mPOS/SCR module to process the reader start/stop req
NXP_RDR_REQ_GUARD_TIME=0
###############################################################################
#MW workaround to enable LPCD when EMVCO polling mode starts and disable
#while switching back to NFC Forum mode
# 0 --> Disable MW workaround
# 1 --> Enable MW workaround
# 2 --> Use this option only for FW versions below 1.10.52
NXP_RDR_DISABLE_ENABLE_LPCD=1
###############################################################################
# Firmware patch format, Only 1 and 5 should be set
# 0 -> NFC Default
# 1 -> EMVCO Default
# 3 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = Removal process
# 5 -> EMVCO Cert Polling, DISC_IDLE = Removal process , DISC DEACTIVATE = POWER_OFF
# 7 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = POWER_OFF
NFA_CONFIG_FORMAT=1
################################################################################
# Enable disconnect tag in screen off
# Disable 0x00
# Enable 0x01
NXP_DISCONNECT_TAG_IN_SCRN_OFF=0x01
#################################################################################
# Core configuration extensions
# It includes
# Wired mode settings A0ED, A0EE
# Tag Detector A040, A041, A043
# Low Power mode A007
# Clock settings A002, A003
# PbF settings A008
# Clock timeout settings A004
# eSE (SVDD) PWR REQ settings A0F2
# Window size A0D8
# DWP Speed A0D5
# How eSE connected to PN553 A012
# UICC2 bit rate A0D1
# SWP1A interface A0D4
# DWP intf behavior config, SVDD Load activated by default if set to 0x31 A037
# Low power tag detection LPTD for power reduction A068
NXP_CORE_CONF_EXTN={20, 02, 36, 03,
A0, EC, 01, 01,
A0, ED, 01, 01,
A0, 68, 2A, 06, 40, 60, 03, 19, 00, 00, 00, 00, 82, 04, 00, 00, 02, 00, 0F, 00, 02, 00, 0F, A0, 00, A0, 00, 03, FA, 00, 00, 00, 4C, 00, 14, 00, 7D, 00, 05, 7F, 00, 00, 01, 00, 03,
}
# A0, F2, 01, 01,
# A0, 40, 01, 01,
# A0, 41, 01, 02,
# A0, 43, 01, 04,
# A0, 02, 01, 01,
# A0, 03, 01, 11,
# A0, 07, 01, 03,
# A0, 08, 01, 01
# }
###############################################################################
# Core configuration settings
# Below params are not recommended to add in CONF block.
# LA_BIT_FRAME_SDD(0x30)
# LA_PLATFORM_CONFIG(0x31)
# LA_SEL_INFO(0x32)
# LB_SENSB_INFO(0x38)
# LF_PROTOCOL(0x50)
# NFCC_CONFIG_CONTROL(0x85)
NXP_CORE_CONF={ 20, 02, 37, 11,
28, 01, 00,
21, 01, 00,
30, 01, 08,
31, 01, 03,
32, 01, 60,
38, 01, 01,
33, 04, 01, 02, 03, 04,
54, 01, 06,
50, 01, 02,
5B, 01, 00,
3E, 01, 00,
80, 01, 01,
81, 01, 01,
82, 01, 0E,
18, 01, 01,
68, 01, 01,
85, 01, 01
}
###############################################################################
# Enable(0x01) or disable(0x00) non-standard tag reading
# Disable Non-standard card read 0x00
# Enable Non-standard card read 0x01
NXP_SUPPORT_NON_STD_CARD=0x00
#################################################################################
# Enable(0x01) or disable(0x00 ) for getting HW Info log over SMB wired
# Disable getting HW info log 0x00
# Enable getting HW info log 0x01
NXP_GET_HW_INFO_LOG=0x00
#################################################################################
# Enable(0x01) or disable(0x00) iso dep sak merge
# Disable SAK merging 0x00
# Enable SAK merging 0x01
NXP_ISO_DEP_MERGE_SAK=0x01
#################################################################################
# Valid time difference range within for non-standard tag detection from first
# Activation fail to next discovery
# Note :- 1. This will take effect only when NXP_SUPPORT_NON_STD_CARD is enabled
# 2. The number will be multiplied by 100ms by MW.
# Default:
# Set to 00 if not supported
# byte[0] MIFARE_CLASSIC 100ms
# byte[1] ISO_DEP 300ms
NXP_NON_STD_CARD_TIMEDIFF={01, 03}
#################################################################################
# Enable or Disable UICC ETSI support
# Disable UICC ETSI support 0
# Enable UICC ETSI support 1
NXP_UICC_ETSI_SUPPORT=0
#################################################################################
# Enable Stop/Start of RF discovery for NFCEE recovery
# Disable RF Restart for NFCEE recovery 0
# Enable RF Restart for NFCEE recovery 1
NXP_RESTART_RF_FOR_NFCEE_RECOVERY=0
#################################################################################
#Tag Presence check timeout in millisecond.
NXP_PRESENCE_CHECK_TIMEOUT = 375
#################################################################################
# MAX 20 RF configuration blocks are supported by MW.
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_1={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_2={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_3={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_4={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_5={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_6={
#}
###############################################################################

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@@ -1,632 +0,0 @@
#################### This file is used by NXP NFC NCI HAL #####################
###############################################################################
# Application options
# Logging Levels
# NXPLOG_DEFAULT_LOGLEVEL 0x01
# ANDROID_LOG_DEBUG 0x04
# ANDROID_LOG_INFO 0x03
# ANDROID_LOG_WARN 0x02
# ANDROID_LOG_ERROR 0x01
# ANDROID_LOG_SILENT 0x00
NXPLOG_EXTNS_LOGLEVEL=0x04
NXPLOG_NCIHAL_LOGLEVEL=0x04
NXPLOG_NCIX_LOGLEVEL=0x04
NXPLOG_NCIR_LOGLEVEL=0x04
NXPLOG_FWDNLD_LOGLEVEL=0x04
NXPLOG_TML_LOGLEVEL=0x04
NFC_DEBUG_ENABLED=1
###############################################################################
# Nfc Device Node name
NXP_NFC_DEV_NODE="/dev/nq-nci"
#################################################################################
#VEN Toggle Config
#Disable = 0x00
#Enable = 0x01
ENABLE_VEN_TOGGLE=0x00
###############################################################################
# Extension for Mifare reader enable
MIFARE_READER_ENABLE=0x01
###############################################################################
# Mifare Reader implementation
# 0: General implementation
# 1: Legacy implementation
LEGACY_MIFARE_READER=0
###############################################################################
# System clock source selection configuration
#define CLK_SRC_XTAL 1
#define CLK_SRC_PLL 2
NXP_SYS_CLK_SRC_SEL=0x02
###############################################################################
# System clock frequency selection configuration
#define CLK_FREQ_UNDEF 0
#define CLK_FREQ_13MHZ 1
#define CLK_FREQ_19_2MHZ 2
#define CLK_FREQ_24MHZ 3
#define CLK_FREQ_26MHZ 4
#define CLK_FREQ_38_4MHZ 5
#define CLK_FREQ_52MHZ 6
#define CLK_FREQ_32MHZ 7
#define CLK_FREQ_48MHZ 8
NXP_SYS_CLK_FREQ_SEL=0x05
###############################################################################
# The timeout value to be used for clock request acknowledgment
# min value = 0x01 to max = 0x06
#NXP_SYS_CLOCK_TO_CFG=0x06
###############################################################################
# The delay to try to start PLL/XTAL when using sys clock 256/fc units = ~18.8 us
# min value = 0x01 to max = 0x1F
#NXP_CLOCK_REQ_DELAY=0x16
###############################################################################
# NXP proprietary settings
NXP_ACT_PROP_EXTN={2F, 02, 00}
###############################################################################
# NXP TVDD configurations settings
# Allow NFCC to configure External TVDD, two configurations (1 and 2) supported,
# out of them only one can be configured at a time.
#NXP_EXT_TVDD_CFG=0x02
###############################################################################
#config1:SLALM, 3.3V for both RM and CM
#NXP_EXT_TVDD_CFG_1={20, 02, 0F, 01, A0, 0E, 0B, 31, 01, 01, 31, 00, 00, 00, 01, 00, D0, 0C}
###############################################################################
#config2: use DCDC in CE, use Tx_Pwr_Req, set CFG2 mode, SLALM,
#monitoring 5V from DCDC, 3.3V for both RM and CM, DCDCWaitTime=4.2ms
#NXP_EXT_TVDD_CFG_2={20, 02, 0F, 01, A0, 0E, 0B, 11, 01, C2, B2, 00, B2, 1E, 1F, 00, D0, 0C}
#NXP_EXT_TVDD_CFG_2={20, 02, 30, 01, A0, 0E, 2C, F0, 00, 3E, 11, E4, E4, E4, 00, 00, 00, 00, 00, A7, 8E, FF, FF, 0F, 0F, 0F, 0F, 0A, 00, 00, 00, 00, 02, 00, 00, 01, 00, 10, 00, 04, 00, 00, 00, 17, 40, 20, 07, 13, 07, 05, 13}
###############################################################################
# Core configuration rf field filter settings to enable set to 01 to disable set
# to 00 last bit
#NXP_CORE_RF_FIELD={ 20, 02, 05, 01, A0, 62, 01, 00 }
###############################################################################
# To enable i2c fragmentation set i2c fragmentation enable 0x01 to disable set
# to 0x00
#NXP_I2C_FRAGMENTATION_ENABLED=0x00
###############################################################################
#set autonomous mode
# disable autonomous 0x00
# enable autonomous 0x01
NXP_AUTONOMOUS_ENABLE=0x00
###############################################################################
#set Guard Timer
# Gurad Timer range to 0x0F-0xFF(i.e.15-255 seconds)
NXP_GUARD_TIMER_VALUE=0x0F
###############################################################################
#Enable SWP full power mode when phone is power off
#NXP_SWP_FULL_PWR_ON=0x00
################################################################################
#This is used to configure UICC2 at boot time.
# UICC2 0x03
NXP_DEFAULT_UICC2_SELECT=0x03
###############################################################################
# CE when Screen state is locked
# This setting is for DEFAULT_AID_ROUTE,
# DEFAULT_DESFIRE_ROUTE and DEFAULT_MIFARE_CLT_ROUTE
# Disable 0x00
# Enable 0x01
NXP_CE_ROUTE_STRICT_DISABLE=0x01
###############################################################################
#SCR Read Tag Operation Timeout in secs
NXP_SWP_RD_TAG_OP_TIMEOUT=20
###############################################################################
#Set the default AID route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_AID_ROUTE=0x01
###############################################################################
#Set the ISODEP (Mifare Desfire) route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_ISODEP_ROUTE=0x01
###############################################################################
#Set the Mifare CLT route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_MIFARE_CLT_ROUTE=0x01
###############################################################################
#Set the Felica CLT route Location :
#This settings will be used when application does not set this parameter
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_FELICA_CLT_ROUTE=0x01
###############################################################################
#Set the default AID Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_AID_PWR_STATE=0x39
###############################################################################
#Set the Mifare Desfire Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_DESFIRE_PWR_STATE=0x3B
###############################################################################
#Set the Mifare CLT Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_MIFARE_CLT_PWR_STATE=0x3B
###############################################################################
#Set the Felica CLT Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_FELICA_CLT_PWR_STATE=0x3B
###############################################################################
#Set the T4TNfcee AID Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_T4TNFCEE_AID_POWER_STATE=0x3B
###############################################################################
#Set the default Felica T3T System Code OffHost route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_SYS_CODE_ROUTE=0x00
###############################################################################
# AID Matching platform options
# AID_MATCHING_L 0x01
# AID_MATCHING_K 0x02
#AID_MATCHING_PLATFORM=0x01
###############################################################################
# P61 interface options
# SPI 0x02
NXP_P61_LS_DEFAULT_INTERFACE=0x00
###############################################################################
#CHINA_TIANJIN_RF_SETTING
#Enable 0x01
#Disable 0x00
#NXP_CHINA_TIANJIN_RF_ENABLED=0x01
###############################################################################
#SWP_SWITCH_TIMEOUT_SETTING
# Allowed range of swp timeout setting is 0x00 to 0x3C [0 - 60].
# Timeout in milliseconds, for example
# No Timeout 0x00
# 10 millisecond timeout 0x0A
#NXP_SWP_SWITCH_TIMEOUT=0x0A
###############################################################################
# Flashing Options Configurations
# FLASH_UPPER_VERSION 0x01
# FLASH_DIFFERENT_VERSION 0x02
# FLASH_ALWAYS 0x03
NXP_FLASH_CONFIG=0x02
###############################################################################
# P61 interface options for JCOP Download
# SPI 0x02
NXP_P61_JCOP_DEFAULT_INTERFACE=0x00
###############################################################################
# Option to perform LS update every boot
# Enable 0x01
# Disable 0x00
NXP_LS_FORCE_UPDATE_REQUIRED=0x00
###############################################################################
# Option to perform JCOP update every boot
# Enable 0x01
# Disable 0x00
NXP_JCOP_FORCE_UPDATE_REQUIRED=0x00
###############################################################################
# Bail out mode
# If set to 1, NFCC is using bail out mode for either Type A or Type B poll.
# Set this parameter value to 1 if Android Beam is enabled, else set to 0.
NFA_POLL_BAIL_OUT_MODE=0x00
###############################################################################
# White list of Hosts
# This values will be the Hosts(NFCEEs) in the HCI Network.
DEVICE_HOST_WHITE_LIST={C0, 80}
###############################################################################
# Choose the presence-check algorithm for type-4 tag. If not defined, the default value is 1.
# 0 NFA_RW_PRES_CHK_DEFAULT; Let stack selects an algorithm
# 1 NFA_RW_PRES_CHK_I_BLOCK; ISO-DEP protocol's empty I-block
# 2 NFA_RW_PRES_CHK_ISO_DEP_NAK; Type - 4 tag protocol iso-dep nak presence check
# command is sent waiting for rsp and ntf.
PRESENCE_CHECK_ALGORITHM=2
###############################################################################
# Options to Fallback to alternative route
# DH 0x01
# ESE 0x02
NXP_CHECK_DEFAULT_PROTO_SE_ID=0x01
###############################################################################
# Vendor Specific Proprietary Protocol & Discovery Configuration
# Set to 0xFF if unsupported
# byte[0] NCI_PROTOCOL_18092_ACTIVE
# byte[1] NCI_PROTOCOL_B_PRIME
# byte[2] NCI_PROTOCOL_DUAL
# byte[3] NCI_PROTOCOL_15693
# byte[4] NCI_PROTOCOL_KOVIO
# byte[5] NCI_PROTOCOL_MIFARE
# byte[6] NCI_DISCOVERY_TYPE_POLL_KOVIO
# byte[7] NCI_DISCOVERY_TYPE_POLL_B_PRIME
# byte[8] NCI_DISCOVERY_TYPE_LISTEN_B_PRIME
NFA_PROPRIETARY_CFG={05, FF, FF, 06, 81, 80, FF, FF, FF}
###############################################################################
#NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE
#Enable/Disable block number checks for china transit use case
#Enable 0x01
#Disable 0x00
#NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE=0x01
################################################################################
#This flags will enable different modes of Lx Debug based on bits of the Byte0
#Byte 0:
# |_________Bit Mask_______| Debug Mode
# b7|b6|b5|b4|b3|b2|b1|b0|
# | |x | | | | | | Modulation Detected Notification
# | | |X | | | | | Enable L1 Events (ISO14443-4, ISO18092)
# | | | |X | | | | Enable L2 Reader Events(ROW specific)
# | | | | |X | | | Enable Felica SystemCode
# | | | | | |X | | Enable Felica RF (all Felica CM events)
# | | | | | | |X | Enable L2 Events CE (ISO14443-3, RF Field ON/OFF)
#Byte 1:
# |_________Bit Mask_______| Debug Mode
# b7|b6|b5|b4|b3|b2|b1|b0|
# | |x | | | | | | Enable L2 events during RF activation ISO 14443-3
# | | | | | | | |
# | | | | | | | |
# | | | | | | | |
# | | | | | | | |
# | | | | | | | |
# Byte1 Byte0
# \__ __/
# e.g. NXP_CORE_PROP_SYSTEM_DEBUG=0x0031 ==> Modulation detected, L1, L2 CE
NXP_CORE_PROP_SYSTEM_DEBUG=0x0000
###############################################################################
#Enable NXP NCI runtime parser library
#Enable 0x01
#Disable 0x00
NXP_NCI_PARSER_LIBRARY=0x00
###############################################################################
# Timeout value in milliseconds for JCOP OS download to complete
OS_DOWNLOAD_TIMEOUT_VALUE=60000
###############################################################################
# Forcing HOST to listen for a selected protocol
# 0x00 : Disable Host Listen
# 0x01 : Enable Host to Listen (A) for ISO-DEP tech A
# 0x02 : Enable Host to Listen (B) for ISO-DEP tech B
# 0x04 : Enable Host to Listen (F) for T3T Tag Type Protocol tech F
# 0x07 : Enable Host to Listen (ABF)for ISO-DEP tech AB & T3T Tag Type Protocol tech F
HOST_LISTEN_TECH_MASK=0x07
###############################################################################
# Enable forward functionality
# Disable 0x00
# Enable 0x01 //Any positive value as per below bit configuration
# HOST power states when type A/B only UICC present
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
FORWARD_FUNCTIONALITY_ENABLE=0x01
###############################################################################
# Configure the NFC Extras to open and use a static pipe. If the value is
# not set or set to 0, then the default is use a dynamic pipe based on a
# destination gate (see NFA_HCI_DEFAULT_DEST_GATE). Note there is a value
# for each EE (ESE/SIM1/SIM2)
OFF_HOST_ESE_PIPE_ID=0x16
OFF_HOST_SIM_PIPE_ID=0x0A
OFF_HOST_SIM2_PIPE_ID=0x23
###############################################################################
#Set the Felica T3T System Code Power state :
#This settings will be used when application does not set this parameter
#Update Power state as per NCI2.0
DEFAULT_SYS_CODE_PWR_STATE=0x00
###############################################################################
#Default Secure Element route id
DEFAULT_OFFHOST_ROUTE=0x01
###############################################################################
#Maximum SMB transceive wait for response
NXP_SMB_TRANSCEIVE_TIMEOUT=2000
###############################################################################
# Firmware file type
#.so file 0x01
#.bin file 0x02
NXP_FW_TYPE=0x01
############################################################################
# Extended APDU length for ISO_DEP
ISO_DEP_MAX_TRANSCEIVE=0xFEFF
#########################################################################
# Support for Amendment I SEMS specification
# Support SEMS Amendment I 0x01
# Support NXP LS client 0x00
NXP_GP_AMD_I_SEMS_SUPPORTED=0x01
###############################################################################
#All eSE terminals shall be match with the /vendor/etc/vintf/manifest.xml file
#under android.hardware.secure_element.
# The terminal name shall start from 1
# Assign terminal number to each interface based on system config
NXP_SPI_SE_TERMINAL_NUM="eSE1"
###############################################################################
# Assign terminal number to each interface based on system config
#NXP_VISO_SE_TERMINAL_NUM="eSE3"
###############################################################################
# Assign terminal number to each interface based on system config
NXP_NFC_SE_TERMINAL_NUM="eSE2"
###############################################################################
#For static or dynamic dual UICC feature support
#Enable static dual uicc feature by setting value 0x00
#Enable dynamic dual uicc feature by setting value 0x01
NXP_DUAL_UICC_ENABLE=0x01
###############################################################################
# Time to wait by DH when NFCC will report eSE Cold Temp Error.
# The value is as per the UM and in seconds
NXP_SE_COLD_TEMP_ERROR_DELAY=0x05
###############################################################################
# Set configuration optimization decision setting
# Enable = 0x01
# Disable = 0x00
NXP_SET_CONFIG_ALWAYS=0x00
###############################################################################
#OffHost ESE route location for MultiSE
#ESE = 01
OFFHOST_ROUTE_ESE={01}
###############################################################################
#OffHost UICC route location for MultiSE
#UICC1 = 02
#UICC2 = 03
OFFHOST_ROUTE_UICC={02:03}
###############################################################################
#T4T NFCEE ENABLE
#bit pos 0 = T4T NFCEE Enable
#bit pos 6 = T4T NFCEE Contactless write enable
#bit pos 7 = Proprietary file enable
NXP_T4T_NFCEE_ENABLE=0x01
###############################################################################
#WLC mode
#0x00 = if WLC Application running in MW (non-autonomous mode)
#0x01 = if WLC Application running in FW (autonomous mode)
NXP_WLC_MODE=0x01
###############################################################################
#CORE_SET_CONF_CMD to reset Prop Emvco Flag
NXP_PROP_RESET_EMVCO_CMD={20, 02, 05, 01, A0, 44, 01, 00}
###############################################################################
#Guard time in ms for the mPOS/SCR module to process the reader start/stop req
NXP_RDR_REQ_GUARD_TIME=0
###############################################################################
#MW workaround to enable LPCD when EMVCO polling mode starts and disable
#while switching back to NFC Forum mode
# 0 --> Disable MW workaround
# 1 --> Enable MW workaround
# 2 --> Use this option only for FW versions below 1.10.52
NXP_RDR_DISABLE_ENABLE_LPCD=1
###############################################################################
# Firmware patch format, Only 1 and 5 should be set
# 0 -> NFC Default
# 1 -> EMVCO Default
# 3 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = Removal process
# 5 -> EMVCO Cert Polling, DISC_IDLE = Removal process , DISC DEACTIVATE = POWER_OFF
# 7 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = POWER_OFF
NFA_CONFIG_FORMAT=1
################################################################################
# Enable disconnect tag in screen off
# Disable 0x00
# Enable 0x01
NXP_DISCONNECT_TAG_IN_SCRN_OFF=0x01
#################################################################################
# Core configuration extensions
# It includes
# Wired mode settings A0ED, A0EE
# Tag Detector A040, A041, A043
# Low Power mode A007
# Clock settings A002, A003
# PbF settings A008
# Clock timeout settings A004
# eSE (SVDD) PWR REQ settings A0F2
# Window size A0D8
# DWP Speed A0D5
# How eSE connected to PN553 A012
# UICC2 bit rate A0D1
# UICC1 interface A0EC
# UICC2 interface A0D4
# eSE interface A0ED
# DWP intf behavior config, SVDD Load activated by default if set to 0x31 A037
# Low power tag detection LPTD for power reduction A068
NXP_CORE_CONF_EXTN={20, 02, 42, 06,
A0, EC, 01, 01,
A0, ED, 01, 01,
A0, D4, 01, 00,
A0, 0A, 01, 0A,
A0, 68, 2A, 06, 40, 60, 03, 19, 00, 00, 00, 00, 82, 04, 00, 00, 02, 00, 0F, 00, 02, 00, 0F, A0, 00, A0, 00, 03, FA, 00, 00, 00, 4C, 00, 14, 00, 7D, 00, 05, 7F, 00, 00, 01, 00, 03,
A0, 0A, 01, 20
}
# A0, F2, 01, 01,
# A0, 40, 01, 01,
# A0, 41, 01, 02,
# A0, 43, 01, 04,
# A0, 02, 01, 01,
# A0, 03, 01, 11,
# A0, 07, 01, 03,
# A0, 08, 01, 01
# }
###############################################################################
# Core configuration settings
# Below params are not recommended to add in CONF block.
# LA_BIT_FRAME_SDD(0x30)
# LA_PLATFORM_CONFIG(0x31)
# LA_SEL_INFO(0x32)
# LB_SENSB_INFO(0x38)
# LF_PROTOCOL(0x50)
# NFCC_CONFIG_CONTROL(0x85)
NXP_CORE_CONF={ 20, 02, 37, 11,
28, 01, 00,
21, 01, 00,
30, 01, 08,
31, 01, 03,
32, 01, 60,
38, 01, 01,
33, 04, 01, 02, 03, 04,
54, 01, 06,
50, 01, 02,
5B, 01, 00,
3E, 01, 00,
80, 01, 01,
81, 01, 01,
82, 01, 0E,
18, 01, 01,
68, 01, 01,
85, 01, 01
}
###############################################################################
# Enable(0x01) or disable(0x00) non-standard tag reading
# Disable Non-standard card read 0x00
# Enable Non-standard card read 0x01
NXP_SUPPORT_NON_STD_CARD=0x00
#################################################################################
# Enable(0x01) or disable(0x00 ) for getting HW Info log over SMB wired
# Disable getting HW info log 0x00
# Enable getting HW info log 0x01
NXP_GET_HW_INFO_LOG=0x00
#################################################################################
# Enable(0x01) or disable(0x00) iso dep sak merge
# Disable SAK merging 0x00
# Enable SAK merging 0x01
NXP_ISO_DEP_MERGE_SAK=0x01
#################################################################################
# Valid time difference range within for non-standard tag detection from first
# Activation fail to next discovery
# Note :- 1. This will take effect only when NXP_SUPPORT_NON_STD_CARD is enabled
# 2. The number will be multiplied by 100ms by MW.
# Default:
# Set to 00 if not supported
# byte[0] MIFARE_CLASSIC 100ms
# byte[1] ISO_DEP 300ms
NXP_NON_STD_CARD_TIMEDIFF={01, 03}
#################################################################################
# Enable or Disable UICC ETSI support
# Disable UICC ETSI support 0
# Enable UICC ETSI support 1
NXP_UICC_ETSI_SUPPORT=0
#################################################################################
# Enable Stop/Start of RF discovery for NFCEE recovery
# Disable RF Restart for NFCEE recovery 0
# Enable RF Restart for NFCEE recovery 1
NXP_RESTART_RF_FOR_NFCEE_RECOVERY=0
#################################################################################
#Tag Presence check timeout in millisecond.
NXP_PRESENCE_CHECK_TIMEOUT = 375
#################################################################################
# MAX 20 RF configuration blocks are supported by MW.
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_1={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_2={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_3={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_4={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_5={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_6={
#}
###############################################################################

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@@ -1,622 +0,0 @@
#################### This file is used by NXP NFC NCI HAL #####################
###############################################################################
# Application options
# Logging Levels
# NXPLOG_DEFAULT_LOGLEVEL 0x01
# ANDROID_LOG_DEBUG 0x04
# ANDROID_LOG_INFO 0x03
# ANDROID_LOG_WARN 0x02
# ANDROID_LOG_ERROR 0x01
# ANDROID_LOG_SILENT 0x00
NXPLOG_EXTNS_LOGLEVEL=0x04
NXPLOG_NCIHAL_LOGLEVEL=0x04
NXPLOG_NCIX_LOGLEVEL=0x04
NXPLOG_NCIR_LOGLEVEL=0x04
NXPLOG_FWDNLD_LOGLEVEL=0x04
NXPLOG_TML_LOGLEVEL=0x04
NFC_DEBUG_ENABLED=1
###############################################################################
# Nfc Device Node name
NXP_NFC_DEV_NODE="/dev/nq-nci"
#################################################################################
#VEN Toggle Config
#Disable = 0x00
#Enable = 0x01
ENABLE_VEN_TOGGLE=0x00
###############################################################################
# Extension for Mifare reader enable
MIFARE_READER_ENABLE=0x01
###############################################################################
# Mifare Reader implementation
# 0: General implementation
# 1: Legacy implementation
LEGACY_MIFARE_READER=0
###############################################################################
# System clock source selection configuration
#define CLK_SRC_XTAL 1
#define CLK_SRC_PLL 2
NXP_SYS_CLK_SRC_SEL=0x02
###############################################################################
# System clock frequency selection configuration
#define CLK_FREQ_13MHZ 1
#define CLK_FREQ_19_2MHZ 2
#define CLK_FREQ_24MHZ 3
#define CLK_FREQ_26MHZ 4
#define CLK_FREQ_38_4MHZ 5
#define CLK_FREQ_52MHZ 6
NXP_SYS_CLK_FREQ_SEL=0x02
###############################################################################
# The timeout value to be used for clock request acknowledgment
# min value = 0x01 to max = 0x06
#NXP_SYS_CLOCK_TO_CFG=0x06
###############################################################################
# The delay to try to start PLL/XTAL when using sys clock 256/fc units = ~18.8 us
# min value = 0x01 to max = 0x1F
#NXP_CLOCK_REQ_DELAY=0x16
###############################################################################
# NXP proprietary settings
NXP_ACT_PROP_EXTN={2F, 02, 00}
###############################################################################
# NXP TVDD configurations settings
# Allow NFCC to configure External TVDD, two configurations (1 and 2) supported,
# out of them only one can be configured at a time.
NXP_EXT_TVDD_CFG=0x02
###############################################################################
#config1:SLALM, 3.3V for both RM and CM
#NXP_EXT_TVDD_CFG_1={20, 02, 0F, 01, A0, 0E, 0B, 31, 01, 01, 31, 00, 00, 00, 01, 00, D0, 0C}
###############################################################################
#config2: use DCDC in CE, use Tx_Pwr_Req, set CFG2 mode, SLALM,
#monitoring 5V from DCDC, 3.3V for both RM and CM, DCDCWaitTime=4.2ms
#NXP_EXT_TVDD_CFG_2={20, 02, 0F, 01, A0, 0E, 0B, 11, 01, C2, B2, 00, B2, 1E, 1F, 00, D0, 0C}
NXP_EXT_TVDD_CFG_2={20, 02, 30, 01, A0, 0E, 2C, F0, 00, 3E, 11, E4, E4, E4, 00, 00, 00, 00, 00, A7, 8E, FF, FF, 0F, 0F, 0F, 0F, 0A, 00, 00, 00, 00, 02, 00, 00, 01, 00, 10, 00, 04, 00, 00, 00, 17, 40, 20, 07, 13, 07, 05, 13}
###############################################################################
# MAX 20 RF configuration blocks are supported by MW.
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_1={
#}
###############################################################################
# By default, the LPCD shall be enabled.
# Please check the platform specific configuration and enable it.
# NXP_RF_CONF_BLK_1={
# 20, 02, 2E, 01,
# A0, 68, 2A, 06, 40, 60, 03, 19, 00, 00, 00, 00,
# 83, 04,
# 00,
# C0, 00, C0, 00,
# 00, 01, 00, 01,
# A0, 00, A0, 00,
# 03, FA, 00, 00, 00, 4C, 00, 14, 00, 7D, 00,
# 05,
# 7F, 00,
# 00, 01,00, 03
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_2={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_3={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_4={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_5={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_6={
#}
###############################################################################
# Set configuration optimization decision setting
# Enable = 0x01
# Disable = 0x00
NXP_SET_CONFIG_ALWAYS=0x01
###############################################################################
# Core configuration rf field filter settings to enable set to 01 to disable set to 00 last bit
#NXP_CORE_RF_FIELD={ 20, 02, 05, 01, A0, 62, 01, 00}
###############################################################################
# To enable i2c fragmentation set i2c fragmentation enable 0x01 to disable set
# to 0x00
#NXP_I2C_FRAGMENTATION_ENABLED=0x00
###############################################################################
# Core configuration extensions
# It includes
# Wired mode settings A0ED, A0EE
# Tag Detector A040, A041, A043
# Low Power mode A007
# Clock settings A002, A003
# PbF settings A008
# Clock timeout settings A004
# eSE (SVDD) PWR REQ settings A0F2
# Window size A0D8
# DWP Speed A0D5
# How eSE connected to PN553 A012
# UICC2 bit rate A0D1
# SWP1A interface A0D4
# DWP intf behavior config, SVDD Load activated by default if set to 0x31 A037
# Low power tag detection LPTD for power reduction A068
NXP_CORE_CONF_EXTN={20, 02, 3A, 04,
A0, EC, 01, 01,
A0, ED, 01, 01,
A0, 68, 2A, 06, 40, 60, 03, 19, 00, 00, 00, 00, 82, 04, 00, 00, 02, 00, 0F, 00, 02, 00, 0F, A0, 00, A0, 00, 03, FA, 00, 00, 00, 4C, 00, 14, 00, 7D, 00, 05, 7F, 00, 00, 01, 00, 03,
A0, 0A, 01, 20
}
# A0, F2, 01, 01,
# A0, 40, 01, 01,
# A0, 41, 01, 02,
# A0, 43, 01, 04,
# A0, 02, 01, 01,
# A0, 03, 01, 11,
# A0, 07, 01, 03,
# A0, 08, 01, 01
# }
###############################################################################
# Core configuration settings
NXP_CORE_CONF={ 20, 02, 37, 11,
28, 01, 00,
21, 01, 00,
30, 01, 08,
31, 01, 03,
32, 01, 60,
38, 01, 01,
33, 04, 01, 02, 03, 04,
54, 01, 06,
50, 01, 02,
5B, 01, 00,
3E, 01, 00,
80, 01, 01,
81, 01, 01,
82, 01, 0E,
18, 01, 01,
68, 01, 01,
85, 01, 01
}
###############################################################################
#set autonomous mode
# disable autonomous 0x00
# enable autonomous 0x01
NXP_AUTONOMOUS_ENABLE=0x00
###############################################################################
#set Guard Timer
# Gurad Timer range to 0x0F-0xFF(i.e.15-255 seconds)
NXP_GUARD_TIMER_VALUE=0x0F
###############################################################################
#Enable SWP full power mode when phone is power off
#NXP_SWP_FULL_PWR_ON=0x00
################################################################################
#This is used to configure UICC2 at boot time.
# UICC2 0x03
NXP_DEFAULT_UICC2_SELECT=0x03
###############################################################################
# CE when Screen state is locked
# This setting is for DEFAULT_AID_ROUTE,
# DEFAULT_DESFIRE_ROUTE and DEFAULT_MIFARE_CLT_ROUTE
# Disable 0x00
# Enable 0x01
NXP_CE_ROUTE_STRICT_DISABLE=0x01
###############################################################################
#SCR Read Tag Operation Timeout in secs
NXP_SWP_RD_TAG_OP_TIMEOUT=20
###############################################################################
#Set the default AID route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_AID_ROUTE=0x01
###############################################################################
#Set the ISODEP (Mifare Desfire) route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_ISODEP_ROUTE=0x01
###############################################################################
#Set the Mifare CLT route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_MIFARE_CLT_ROUTE=0x01
###############################################################################
#Set the Felica CLT route Location :
#This settings will be used when application does not set this parameter
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_FELICA_CLT_ROUTE=0x01
###############################################################################
#Set the default AID Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_AID_PWR_STATE=0x39
###############################################################################
#Set the Mifare Desfire Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_DESFIRE_PWR_STATE=0x3B
###############################################################################
#Set the Mifare CLT Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_MIFARE_CLT_PWR_STATE=0x3B
###############################################################################
#Set the Felica CLT Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_FELICA_CLT_PWR_STATE=0x3B
###############################################################################
#Set the T4TNfcee AID Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_T4TNFCEE_AID_POWER_STATE=0x3B
###############################################################################
#Set the default Felica T3T System Code OffHost route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_SYS_CODE_ROUTE=0x00
###############################################################################
# AID Matching platform options
# AID_MATCHING_L 0x01
# AID_MATCHING_K 0x02
#AID_MATCHING_PLATFORM=0x01
###############################################################################
# P61 interface options
# SPI 0x02
NXP_P61_LS_DEFAULT_INTERFACE=0x00
###############################################################################
#CHINA_TIANJIN_RF_SETTING
#Enable 0x01
#Disable 0x00
#NXP_CHINA_TIANJIN_RF_ENABLED=0x01
###############################################################################
#SWP_SWITCH_TIMEOUT_SETTING
# Allowed range of swp timeout setting is 0x00 to 0x3C [0 - 60].
# Timeout in milliseconds, for example
# No Timeout 0x00
# 10 millisecond timeout 0x0A
#NXP_SWP_SWITCH_TIMEOUT=0x0A
###############################################################################
# Flashing Options Configurations
# FLASH_UPPER_VERSION 0x01
# FLASH_DIFFERENT_VERSION 0x02
# FLASH_ALWAYS 0x03
NXP_FLASH_CONFIG=0x02
###############################################################################
# P61 interface options for JCOP Download
# SPI 0x02
NXP_P61_JCOP_DEFAULT_INTERFACE=0x00
###############################################################################
# Option to perform LS update every boot
# Enable 0x01
# Disable 0x00
NXP_LS_FORCE_UPDATE_REQUIRED=0x00
###############################################################################
# Option to perform JCOP update every boot
# Enable 0x01
# Disable 0x00
NXP_JCOP_FORCE_UPDATE_REQUIRED=0x00
###############################################################################
# Bail out mode
# If set to 1, NFCC is using bail out mode for either Type A or Type B poll.
# Set this parameter value to 1 if Android Beam is enabled, else set to 0.
NFA_POLL_BAIL_OUT_MODE=0x00
###############################################################################
# White list of Hosts
# This values will be the Hosts(NFCEEs) in the HCI Network.
DEVICE_HOST_WHITE_LIST={C0, 80}
###############################################################################
# Choose the presence-check algorithm for type-4 tag. If not defined, the default value is 1.
# 0 NFA_RW_PRES_CHK_DEFAULT; Let stack selects an algorithm
# 1 NFA_RW_PRES_CHK_I_BLOCK; ISO-DEP protocol's empty I-block
# 2 NFA_RW_PRES_CHK_ISO_DEP_NAK; Type - 4 tag protocol iso-dep nak presence check
# command is sent waiting for rsp and ntf.
PRESENCE_CHECK_ALGORITHM=2
###############################################################################
# Options to Fallback to alternative route
# DH 0x01
# ESE 0x02
NXP_CHECK_DEFAULT_PROTO_SE_ID=0x01
###############################################################################
# Vendor Specific Proprietary Protocol & Discovery Configuration
# Set to 0xFF if unsupported
# byte[0] NCI_PROTOCOL_18092_ACTIVE
# byte[1] NCI_PROTOCOL_B_PRIME
# byte[2] NCI_PROTOCOL_DUAL
# byte[3] NCI_PROTOCOL_15693
# byte[4] NCI_PROTOCOL_KOVIO
# byte[5] NCI_PROTOCOL_MIFARE
# byte[6] NCI_DISCOVERY_TYPE_POLL_KOVIO
# byte[7] NCI_DISCOVERY_TYPE_POLL_B_PRIME
# byte[8] NCI_DISCOVERY_TYPE_LISTEN_B_PRIME
NFA_PROPRIETARY_CFG={05, FF, FF, 06, 81, 80, FF, FF, FF}
###############################################################################
#NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE
#Enable/Disable block number checks for china transit use case
#Enable 0x01
#Disable 0x00
#NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE=0x01
################################################################################
#This flags will enable different modes of Lx Debug based on bits of the Byte0
#Byte 0:
# |_________Bit Mask_______| Debug Mode
# b7|b6|b5|b4|b3|b2|b1|b0|
# | |x | | | | | | Modulation Detected Notification
# | | |X | | | | | Enable L1 Events (ISO14443-4, ISO18092)
# | | | |X | | | | Enable L2 Reader Events(ROW specific)
# | | | | |X | | | Enable Felica SystemCode
# | | | | | |X | | Enable Felica RF (all Felica CM events)
# | | | | | | |X | Enable L2 Events CE (ISO14443-3, RF Field ON/OFF)
#Byte 1: RFU, shall always be 0x00
# Byte1 Byte0
# \__ __/
# e.g. NXP_CORE_PROP_SYSTEM_DEBUG=0x0031 ==> Modulation detected, L1, L2 CE
NXP_CORE_PROP_SYSTEM_DEBUG=0x0000
###############################################################################
#Enable NXP NCI runtime parser library
#Enable 0x01
#Disable 0x00
NXP_NCI_PARSER_LIBRARY=0x00
###############################################################################
# Timeout value in milliseconds for JCOP OS download to complete
OS_DOWNLOAD_TIMEOUT_VALUE=60000
###############################################################################
# Forcing HOST to listen for a selected protocol
# 0x00 : Disable Host Listen
# 0x01 : Enable Host to Listen (A) for ISO-DEP tech A
# 0x02 : Enable Host to Listen (B) for ISO-DEP tech B
# 0x04 : Enable Host to Listen (F) for T3T Tag Type Protocol tech F
# 0x07 : Enable Host to Listen (ABF)for ISO-DEP tech AB & T3T Tag Type Protocol tech F
HOST_LISTEN_TECH_MASK=0x07
###############################################################################
# Enable forward functionality
# Disable 0x00
# Enable 0x01 //Any positive value as per below bit configuration
# HOST power states when type A/B only UICC present
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
FORWARD_FUNCTIONALITY_ENABLE=0x01
###############################################################################
# Configure the NFC Extras to open and use a static pipe. If the value is
# not set or set to 0, then the default is use a dynamic pipe based on a
# destination gate (see NFA_HCI_DEFAULT_DEST_GATE). Note there is a value
# for each EE (ESE/SIM1/SIM2)
OFF_HOST_ESE_PIPE_ID=0x16
OFF_HOST_SIM_PIPE_ID=0x0A
OFF_HOST_SIM2_PIPE_ID=0x23
###############################################################################
#Set the Felica T3T System Code Power state :
#This settings will be used when application does not set this parameter
#Update Power state as per NCI2.0
DEFAULT_SYS_CODE_PWR_STATE=0x00
###############################################################################
#Default Secure Element route id
DEFAULT_OFFHOST_ROUTE=0x01
###############################################################################
#Maximum SMB transceive wait for response
NXP_SMB_TRANSCEIVE_TIMEOUT=2000
###############################################################################
# Firmware file type
#.so file 0x01
#.bin file 0x02
NXP_FW_TYPE=0x01
############################################################################
# Extended APDU length for ISO_DEP
ISO_DEP_MAX_TRANSCEIVE=0xFEFF
#########################################################################
# Support for Amendment I SEMS specification
# Support SEMS Amendment I 0x01
# Support NXP LS client 0x00
NXP_GP_AMD_I_SEMS_SUPPORTED=0x01
###############################################################################
#All eSE terminals shall be match with the /vendor/etc/vintf/manifest.xml file
#under android.hardware.secure_element
# The terminal name shall start from 1
# Assign terminal number to each interface based on system config
NXP_SPI_SE_TERMINAL_NUM="eSE1"
###############################################################################
# Assign terminal number to each interface based on system config
#NXP_VISO_SE_TERMINAL_NUM="eSE3"
###############################################################################
# Assign terminal number to each interface based on system config
NXP_NFC_SE_TERMINAL_NUM="eSE2"
###############################################################################
#For static or dynamic dual UICC feature support
#Enable static dual uicc feature by setting value 0x00
#Enable dynamic dual uicc feature by setting value 0x01
NXP_DUAL_UICC_ENABLE=0x01
###############################################################################
# Time to wait by DH when NFCC will report eSE Cold Temp Error.
# The value is as per the UM and in seconds
NXP_SE_COLD_TEMP_ERROR_DELAY=0x05
###############################################################################
#OffHost ESE route location for MultiSE
#ESE = 01
OFFHOST_ROUTE_ESE={01}
###############################################################################
#OffHost UICC route location for MultiSE
#UICC1 = 02
#UICC2 = 03
OFFHOST_ROUTE_UICC={02:03}
###############################################################################
#T4T NFCEE ENABLE
#bit pos 0 = T4T NFCEE Enable
#bit pos 6 = T4T NFCEE Contactless write enable
NXP_T4T_NFCEE_ENABLE=0x01
###############################################################################
#CORE_SET_CONF_CMD to reset Prop Emvco Flag
NXP_PROP_RESET_EMVCO_CMD={20, 02, 05, 01, A0, 44, 01, 00}
###############################################################################
#Guard time in ms for the mPOS/SCR module to process the reader start/stop req
NXP_RDR_REQ_GUARD_TIME=0
###############################################################################
#MW workaround to enable LPCD when EMVCO polling mode starts and disable
#while switching back to NFC Forum mode
# 0 --> Disable MW workaround
# 1 --> Enable MW workaround
# 2 --> Use this option only for FW versions below 1.10.52
NXP_RDR_DISABLE_ENABLE_LPCD=0
###############################################################################
# Firmware patch format, Only 1 and 5 should be set
# 0 -> NFC Default
# 1 -> EMVCO Default
# 3 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = Removal process
# 5 -> EMVCO Cert Polling, DISC_IDLE = Removal process , DISC DEACTIVATE = POWER_OFF
# 7 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = POWER_OFF
NFA_CONFIG_FORMAT=1
#################################################################################
# Enable disconnect tag in screen off
# Disable 0x00
# Enable 0x01
NXP_DISCONNECT_TAG_IN_SCRN_OFF=0x01
#################################################################################
###############################################################################
# Enable(0x01) or disable(0x00) non-standard tag reading
# Disable Non-standard card read 0x00
# Enable Non-standard card read 0x01
NXP_SUPPORT_NON_STD_CARD=0x00
#################################################################################
# Enable(0x01) or disable(0x00 ) for getting HW Info log over SMB wired
# Disable getting HW info log 0x00
# Enable getting HW info log 0x01
NXP_GET_HW_INFO_LOG=0x00
#################################################################################
# Enable(0x01) or disable(0x00) iso dep sak merge
# Disable SAK merging 0x00
# Enable SAK merging 0x01
NXP_ISO_DEP_MERGE_SAK=0x01
#################################################################################
# Valid time difference range within for non-standard tag detection from first
# Activation fail to next discovery
# Note :- 1. This will take effect only when NXP_SUPPORT_NON_STD_CARD is enabled
# 2. The number will be multiplied by 100ms by MW.
# Default:
# Set to 00 if not supported
# byte[0] MIFARE_CLASSIC 100ms
# byte[1] ISO_DEP 300ms
NXP_NON_STD_CARD_TIMEDIFF={01, 03}
#################################################################################
# Enable or Disable UICC ETSI support
# Disable UICC ETSI support 0
# Enable UICC ETSI support 1
NXP_UICC_ETSI_SUPPORT=0
#################################################################################
# Minimal FW Version used for recovery
NXP_MINIMAL_FW_VERSION=0x110DE
#################################################################################
# Enable Stop/Start of RF discovery for NFCEE recovery
# Disable RF Restart for NFCEE recovery 0
# Enable RF Restart for NFCEE recovery 1
NXP_RESTART_RF_FOR_NFCEE_RECOVERY=0
#################################################################################
# Enable or Disable the minimal FW recovery support.
# This logic will get enabled on early NFC hal boot.
# Disable NFCC RECOVERY support 0x00
# Enable NFCC RECOVERY support 0x01
NXP_NFCC_RECOVERY_SUPPORT=0x01
#################################################################################

View File

@@ -1,623 +0,0 @@
#################### This file is used by NXP NFC NCI HAL #####################
###############################################################################
# Application options
# Logging Levels
# NXPLOG_DEFAULT_LOGLEVEL 0x01
# ANDROID_LOG_DEBUG 0x04
# ANDROID_LOG_INFO 0x03
# ANDROID_LOG_WARN 0x02
# ANDROID_LOG_ERROR 0x01
# ANDROID_LOG_SILENT 0x00
NXPLOG_EXTNS_LOGLEVEL=0x04
NXPLOG_NCIHAL_LOGLEVEL=0x04
NXPLOG_NCIX_LOGLEVEL=0x04
NXPLOG_NCIR_LOGLEVEL=0x04
NXPLOG_FWDNLD_LOGLEVEL=0x04
NXPLOG_TML_LOGLEVEL=0x04
NFC_DEBUG_ENABLED=1
###############################################################################
# Nfc Device Node name
NXP_NFC_DEV_NODE="/dev/nq-nci"
#################################################################################
#VEN Toggle Config
#Disable = 0x00
#Enable = 0x01
ENABLE_VEN_TOGGLE=0x00
###############################################################################
# Extension for Mifare reader enable
MIFARE_READER_ENABLE=0x01
###############################################################################
# Mifare Reader implementation
# 0: General implementation
# 1: Legacy implementation
LEGACY_MIFARE_READER=0
###############################################################################
# System clock source selection configuration
#define CLK_SRC_XTAL 1
#define CLK_SRC_PLL 2
NXP_SYS_CLK_SRC_SEL=0x02
###############################################################################
# System clock frequency selection configuration
#define CLK_FREQ_13MHZ 1
#define CLK_FREQ_19_2MHZ 2
#define CLK_FREQ_24MHZ 3
#define CLK_FREQ_26MHZ 4
#define CLK_FREQ_32MHZ 5
#define CLK_FREQ_38_4MHZ 6
#define CLK_FREQ_52MHZ 7
NXP_SYS_CLK_FREQ_SEL=0x06
###############################################################################
# The timeout value to be used for clock request acknowledgment
# min value = 0x01 to max = 0x06
#NXP_SYS_CLOCK_TO_CFG=0x06
###############################################################################
# The delay to try to start PLL/XTAL when using sys clock 256/fc units = ~18.8 us
# min value = 0x01 to max = 0x1F
#NXP_CLOCK_REQ_DELAY=0x16
###############################################################################
# NXP proprietary settings
NXP_ACT_PROP_EXTN={2F, 02, 00}
###############################################################################
# NXP TVDD configurations settings
# Allow NFCC to configure External TVDD, two configurations (1 and 2) supported,
# out of them only one can be configured at a time.
NXP_EXT_TVDD_CFG=0x02
###############################################################################
#config1:SLALM, 3.3V for both RM and CM
#NXP_EXT_TVDD_CFG_1={20, 02, 0F, 01, A0, 0E, 0B, 31, 01, 01, 31, 00, 00, 00, 01, 00, D0, 0C}
###############################################################################
#config2: use DCDC in CE, use Tx_Pwr_Req, set CFG2 mode, SLALM,
#monitoring 5V from DCDC, 3.3V for both RM and CM, DCDCWaitTime=4.2ms
#NXP_EXT_TVDD_CFG_2={20, 02, 0F, 01, A0, 0E, 0B, 11, 01, C2, B2, 00, B2, 1E, 1F, 00, D0, 0C}
NXP_EXT_TVDD_CFG_2={20, 02, 30, 01, A0, 0E, 2C, F0, 00, 3E, 11, E4, E4, E4, 00, 00, 00, 00, 00, A7, 8E, FF, FF, 0F, 0F, 0F, 0F, 0A, 00, 00, 00, 00, 02, 00, 00, 01, 00, 10, 00, 04, 00, 00, 00, 17, 40, 20, 07, 13, 07, 05, 13}
###############################################################################
# MAX 20 RF configuration blocks are supported by MW.
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_1={
#}
###############################################################################
# By default, the LPCD shall be enabled.
# Please check the platform specific configuration and enable it.
# NXP_RF_CONF_BLK_1={
# 20, 02, 2E, 01,
# A0, 68, 2A, 06, 40, 60, 03, 19, 00, 00, 00, 00,
# 83, 04,
# 00,
# C0, 00, C0, 00,
# 00, 01, 00, 01,
# A0, 00, A0, 00,
# 03, FA, 00, 00, 00, 4C, 00, 14, 00, 7D, 00,
# 05,
# 7F, 00,
# 00, 01,00, 03
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_2={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_3={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_4={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_5={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_6={
#}
###############################################################################
# Set configuration optimization decision setting
# Enable = 0x01
# Disable = 0x00
NXP_SET_CONFIG_ALWAYS=0x01
###############################################################################
# Core configuration rf field filter settings to enable set to 01 to disable set to 00 last bit
#NXP_CORE_RF_FIELD={ 20, 02, 05, 01, A0, 62, 01, 00}
###############################################################################
# To enable i2c fragmentation set i2c fragmentation enable 0x01 to disable set
# to 0x00
#NXP_I2C_FRAGMENTATION_ENABLED=0x00
###############################################################################
# Core configuration extensions
# It includes
# Wired mode settings A0ED, A0EE
# Tag Detector A040, A041, A043
# Low Power mode A007
# Clock settings A002, A003
# PbF settings A008
# Clock timeout settings A004
# eSE (SVDD) PWR REQ settings A0F2
# Window size A0D8
# DWP Speed A0D5
# How eSE connected to PN553 A012
# UICC2 bit rate A0D1
# SWP1A interface A0D4
# DWP intf behavior config, SVDD Load activated by default if set to 0x31 A037
# Low power tag detection LPTD for power reduction A068
NXP_CORE_CONF_EXTN={20, 02, 3A, 04,
A0, EC, 01, 01,
A0, ED, 01, 01,
A0, 68, 2A, 06, 40, 60, 03, 19, 00, 00, 00, 00, 82, 04, 00, 00, 02, 00, 0F, 00, 02, 00, 0F, A0, 00, A0, 00, 03, FA, 00, 00, 00, 4C, 00, 14, 00, 7D, 00, 05, 7F, 00, 00, 01, 00, 03,
A0, 0A, 01, 20
}
# A0, F2, 01, 01,
# A0, 40, 01, 01,
# A0, 41, 01, 02,
# A0, 43, 01, 04,
# A0, 02, 01, 01,
# A0, 03, 01, 11,
# A0, 07, 01, 03,
# A0, 08, 01, 01
# }
###############################################################################
# Core configuration settings
NXP_CORE_CONF={ 20, 02, 37, 11,
28, 01, 00,
21, 01, 00,
30, 01, 08,
31, 01, 03,
32, 01, 60,
38, 01, 01,
33, 04, 01, 02, 03, 04,
54, 01, 06,
50, 01, 02,
5B, 01, 00,
3E, 01, 00,
80, 01, 01,
81, 01, 01,
82, 01, 0E,
18, 01, 01,
68, 01, 01,
85, 01, 01
}
###############################################################################
#set autonomous mode
# disable autonomous 0x00
# enable autonomous 0x01
NXP_AUTONOMOUS_ENABLE=0x00
###############################################################################
#set Guard Timer
# Gurad Timer range to 0x0F-0xFF(i.e.15-255 seconds)
NXP_GUARD_TIMER_VALUE=0x0F
###############################################################################
#Enable SWP full power mode when phone is power off
#NXP_SWP_FULL_PWR_ON=0x00
################################################################################
#This is used to configure UICC2 at boot time.
# UICC2 0x03
NXP_DEFAULT_UICC2_SELECT=0x03
###############################################################################
# CE when Screen state is locked
# This setting is for DEFAULT_AID_ROUTE,
# DEFAULT_DESFIRE_ROUTE and DEFAULT_MIFARE_CLT_ROUTE
# Disable 0x00
# Enable 0x01
NXP_CE_ROUTE_STRICT_DISABLE=0x01
###############################################################################
#SCR Read Tag Operation Timeout in secs
NXP_SWP_RD_TAG_OP_TIMEOUT=20
###############################################################################
#Set the default AID route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_AID_ROUTE=0x01
###############################################################################
#Set the ISODEP (Mifare Desfire) route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_ISODEP_ROUTE=0x01
###############################################################################
#Set the Mifare CLT route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_MIFARE_CLT_ROUTE=0x01
###############################################################################
#Set the Felica CLT route Location :
#This settings will be used when application does not set this parameter
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_FELICA_CLT_ROUTE=0x01
###############################################################################
#Set the default AID Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_AID_PWR_STATE=0x39
###############################################################################
#Set the Mifare Desfire Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_DESFIRE_PWR_STATE=0x3B
###############################################################################
#Set the Mifare CLT Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_MIFARE_CLT_PWR_STATE=0x3B
###############################################################################
#Set the Felica CLT Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_FELICA_CLT_PWR_STATE=0x3B
###############################################################################
#Set the T4TNfcee AID Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_T4TNFCEE_AID_POWER_STATE=0x3B
###############################################################################
#Set the default Felica T3T System Code OffHost route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_SYS_CODE_ROUTE=0x00
###############################################################################
# AID Matching platform options
# AID_MATCHING_L 0x01
# AID_MATCHING_K 0x02
#AID_MATCHING_PLATFORM=0x01
###############################################################################
# P61 interface options
# SPI 0x02
NXP_P61_LS_DEFAULT_INTERFACE=0x00
###############################################################################
#CHINA_TIANJIN_RF_SETTING
#Enable 0x01
#Disable 0x00
#NXP_CHINA_TIANJIN_RF_ENABLED=0x01
###############################################################################
#SWP_SWITCH_TIMEOUT_SETTING
# Allowed range of swp timeout setting is 0x00 to 0x3C [0 - 60].
# Timeout in milliseconds, for example
# No Timeout 0x00
# 10 millisecond timeout 0x0A
#NXP_SWP_SWITCH_TIMEOUT=0x0A
###############################################################################
# Flashing Options Configurations
# FLASH_UPPER_VERSION 0x01
# FLASH_DIFFERENT_VERSION 0x02
# FLASH_ALWAYS 0x03
NXP_FLASH_CONFIG=0x02
###############################################################################
# P61 interface options for JCOP Download
# SPI 0x02
NXP_P61_JCOP_DEFAULT_INTERFACE=0x00
###############################################################################
# Option to perform LS update every boot
# Enable 0x01
# Disable 0x00
NXP_LS_FORCE_UPDATE_REQUIRED=0x00
###############################################################################
# Option to perform JCOP update every boot
# Enable 0x01
# Disable 0x00
NXP_JCOP_FORCE_UPDATE_REQUIRED=0x00
###############################################################################
# Bail out mode
# If set to 1, NFCC is using bail out mode for either Type A or Type B poll.
# Set this parameter value to 1 if Android Beam is enabled, else set to 0.
NFA_POLL_BAIL_OUT_MODE=0x00
###############################################################################
# White list of Hosts
# This values will be the Hosts(NFCEEs) in the HCI Network.
DEVICE_HOST_WHITE_LIST={C0, 80}
###############################################################################
# Choose the presence-check algorithm for type-4 tag. If not defined, the default value is 1.
# 0 NFA_RW_PRES_CHK_DEFAULT; Let stack selects an algorithm
# 1 NFA_RW_PRES_CHK_I_BLOCK; ISO-DEP protocol's empty I-block
# 2 NFA_RW_PRES_CHK_ISO_DEP_NAK; Type - 4 tag protocol iso-dep nak presence check
# command is sent waiting for rsp and ntf.
PRESENCE_CHECK_ALGORITHM=2
###############################################################################
# Options to Fallback to alternative route
# DH 0x01
# ESE 0x02
NXP_CHECK_DEFAULT_PROTO_SE_ID=0x01
###############################################################################
# Vendor Specific Proprietary Protocol & Discovery Configuration
# Set to 0xFF if unsupported
# byte[0] NCI_PROTOCOL_18092_ACTIVE
# byte[1] NCI_PROTOCOL_B_PRIME
# byte[2] NCI_PROTOCOL_DUAL
# byte[3] NCI_PROTOCOL_15693
# byte[4] NCI_PROTOCOL_KOVIO
# byte[5] NCI_PROTOCOL_MIFARE
# byte[6] NCI_DISCOVERY_TYPE_POLL_KOVIO
# byte[7] NCI_DISCOVERY_TYPE_POLL_B_PRIME
# byte[8] NCI_DISCOVERY_TYPE_LISTEN_B_PRIME
NFA_PROPRIETARY_CFG={05, FF, FF, 06, 81, 80, FF, FF, FF}
###############################################################################
#NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE
#Enable/Disable block number checks for china transit use case
#Enable 0x01
#Disable 0x00
#NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE=0x01
################################################################################
#This flags will enable different modes of Lx Debug based on bits of the Byte0
#Byte 0:
# |_________Bit Mask_______| Debug Mode
# b7|b6|b5|b4|b3|b2|b1|b0|
# | |x | | | | | | Modulation Detected Notification
# | | |X | | | | | Enable L1 Events (ISO14443-4, ISO18092)
# | | | |X | | | | Enable L2 Reader Events(ROW specific)
# | | | | |X | | | Enable Felica SystemCode
# | | | | | |X | | Enable Felica RF (all Felica CM events)
# | | | | | | |X | Enable L2 Events CE (ISO14443-3, RF Field ON/OFF)
#Byte 1: RFU, shall always be 0x00
# Byte1 Byte0
# \__ __/
# e.g. NXP_CORE_PROP_SYSTEM_DEBUG=0x0031 ==> Modulation detected, L1, L2 CE
NXP_CORE_PROP_SYSTEM_DEBUG=0x0000
###############################################################################
#Enable NXP NCI runtime parser library
#Enable 0x01
#Disable 0x00
NXP_NCI_PARSER_LIBRARY=0x00
###############################################################################
# Timeout value in milliseconds for JCOP OS download to complete
OS_DOWNLOAD_TIMEOUT_VALUE=60000
###############################################################################
# Forcing HOST to listen for a selected protocol
# 0x00 : Disable Host Listen
# 0x01 : Enable Host to Listen (A) for ISO-DEP tech A
# 0x02 : Enable Host to Listen (B) for ISO-DEP tech B
# 0x04 : Enable Host to Listen (F) for T3T Tag Type Protocol tech F
# 0x07 : Enable Host to Listen (ABF)for ISO-DEP tech AB & T3T Tag Type Protocol tech F
HOST_LISTEN_TECH_MASK=0x07
###############################################################################
# Enable forward functionality
# Disable 0x00
# Enable 0x01 //Any positive value as per below bit configuration
# HOST power states when type A/B only UICC present
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
FORWARD_FUNCTIONALITY_ENABLE=0x01
###############################################################################
# Configure the NFC Extras to open and use a static pipe. If the value is
# not set or set to 0, then the default is use a dynamic pipe based on a
# destination gate (see NFA_HCI_DEFAULT_DEST_GATE). Note there is a value
# for each EE (ESE/SIM1/SIM2)
OFF_HOST_ESE_PIPE_ID=0x16
OFF_HOST_SIM_PIPE_ID=0x0A
OFF_HOST_SIM2_PIPE_ID=0x23
###############################################################################
#Set the Felica T3T System Code Power state :
#This settings will be used when application does not set this parameter
#Update Power state as per NCI2.0
DEFAULT_SYS_CODE_PWR_STATE=0x00
###############################################################################
#Default Secure Element route id
DEFAULT_OFFHOST_ROUTE=0x01
###############################################################################
#Maximum SMB transceive wait for response
NXP_SMB_TRANSCEIVE_TIMEOUT=2000
###############################################################################
# Firmware file type
#.so file 0x01
#.bin file 0x02
NXP_FW_TYPE=0x01
############################################################################
# Extended APDU length for ISO_DEP
ISO_DEP_MAX_TRANSCEIVE=0xFEFF
#########################################################################
# Support for Amendment I SEMS specification
# Support SEMS Amendment I 0x01
# Support NXP LS client 0x00
NXP_GP_AMD_I_SEMS_SUPPORTED=0x01
###############################################################################
#All eSE terminals shall be match with the /vendor/etc/vintf/manifest.xml file
#under android.hardware.secure_element
# The terminal name shall start from 1
# Assign terminal number to each interface based on system config
NXP_SPI_SE_TERMINAL_NUM="eSE1"
###############################################################################
# Assign terminal number to each interface based on system config
#NXP_VISO_SE_TERMINAL_NUM="eSE3"
###############################################################################
# Assign terminal number to each interface based on system config
NXP_NFC_SE_TERMINAL_NUM="eSE2"
###############################################################################
#For static or dynamic dual UICC feature support
#Enable static dual uicc feature by setting value 0x00
#Enable dynamic dual uicc feature by setting value 0x01
NXP_DUAL_UICC_ENABLE=0x01
###############################################################################
# Time to wait by DH when NFCC will report eSE Cold Temp Error.
# The value is as per the UM and in seconds
NXP_SE_COLD_TEMP_ERROR_DELAY=0x05
###############################################################################
#OffHost ESE route location for MultiSE
#ESE = 01
OFFHOST_ROUTE_ESE={01}
###############################################################################
#OffHost UICC route location for MultiSE
#UICC1 = 02
#UICC2 = 03
OFFHOST_ROUTE_UICC={02:03}
###############################################################################
#T4T NFCEE ENABLE
#bit pos 0 = T4T NFCEE Enable
#bit pos 6 = T4T NFCEE Contactless write enable
NXP_T4T_NFCEE_ENABLE=0x01
###############################################################################
#CORE_SET_CONF_CMD to reset Prop Emvco Flag
NXP_PROP_RESET_EMVCO_CMD={20, 02, 05, 01, A0, 44, 01, 00}
###############################################################################
#Guard time in ms for the mPOS/SCR module to process the reader start/stop req
NXP_RDR_REQ_GUARD_TIME=0
###############################################################################
#MW workaround to enable LPCD when EMVCO polling mode starts and disable
#while switching back to NFC Forum mode
# 0 --> Disable MW workaround
# 1 --> Enable MW workaround
# 2 --> Use this option only for FW versions below 1.10.52
NXP_RDR_DISABLE_ENABLE_LPCD=0
###############################################################################
# Firmware patch format, Only 1 and 5 should be set
# 0 -> NFC Default
# 1 -> EMVCO Default
# 3 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = Removal process
# 5 -> EMVCO Cert Polling, DISC_IDLE = Removal process , DISC DEACTIVATE = POWER_OFF
# 7 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = POWER_OFF
NFA_CONFIG_FORMAT=1
#################################################################################
# Enable disconnect tag in screen off
# Disable 0x00
# Enable 0x01
NXP_DISCONNECT_TAG_IN_SCRN_OFF=0x01
#################################################################################
###############################################################################
# Enable(0x01) or disable(0x00) non-standard tag reading
# Disable Non-standard card read 0x00
# Enable Non-standard card read 0x01
NXP_SUPPORT_NON_STD_CARD=0x00
#################################################################################
# Enable(0x01) or disable(0x00 ) for getting HW Info log over SMB wired
# Disable getting HW info log 0x00
# Enable getting HW info log 0x01
NXP_GET_HW_INFO_LOG=0x00
#################################################################################
# Enable(0x01) or disable(0x00) iso dep sak merge
# Disable SAK merging 0x00
# Enable SAK merging 0x01
NXP_ISO_DEP_MERGE_SAK=0x01
#################################################################################
# Valid time difference range within for non-standard tag detection from first
# Activation fail to next discovery
# Note :- 1. This will take effect only when NXP_SUPPORT_NON_STD_CARD is enabled
# 2. The number will be multiplied by 100ms by MW.
# Default:
# Set to 00 if not supported
# byte[0] MIFARE_CLASSIC 100ms
# byte[1] ISO_DEP 300ms
NXP_NON_STD_CARD_TIMEDIFF={01, 03}
#################################################################################
# Enable or Disable UICC ETSI support
# Disable UICC ETSI support 0
# Enable UICC ETSI support 1
NXP_UICC_ETSI_SUPPORT=0
#################################################################################
# Minimal FW Version used for recovery
NXP_MINIMAL_FW_VERSION=0x110DE
#################################################################################
# Enable Stop/Start of RF discovery for NFCEE recovery
# Disable RF Restart for NFCEE recovery 0
# Enable RF Restart for NFCEE recovery 1
NXP_RESTART_RF_FOR_NFCEE_RECOVERY=0
#################################################################################
# Enable or Disable the minimal FW recovery support.
# This logic will get enabled on early NFC hal boot.
# Disable NFCC RECOVERY support 0x00
# Enable NFCC RECOVERY support 0x01
NXP_NFCC_RECOVERY_SUPPORT=0x01
#################################################################################

View File

@@ -1,628 +0,0 @@
## This file is used by NFC NXP NCI HAL(external/libnfc-nci/halimpl/pn547)
## and NFC Service Java Native Interface Extensions (packages/apps/Nfc/nci/jni/extns/pn547)
###############################################################################
# Application options
# Logging Levels
# NXPLOG_DEFAULT_LOGLEVEL 0x01
# ANDROID_LOG_DEBUG 0x03
# ANDROID_LOG_WARN 0x02
# ANDROID_LOG_ERROR 0x01
# ANDROID_LOG_SILENT 0x00
NXPLOG_EXTNS_LOGLEVEL=0x03
NXPLOG_NCIHAL_LOGLEVEL=0x03
NXPLOG_NCIX_LOGLEVEL=0x03
NXPLOG_NCIR_LOGLEVEL=0x03
NXPLOG_FWDNLD_LOGLEVEL=0x03
NXPLOG_TML_LOGLEVEL=0x03
NFC_DEBUG_ENABLED=1
###############################################################################
# Nfc Device Node name
NXP_NFC_DEV_NODE="/dev/nq-nci"
###############################################################################
# Extension for Mifare reader enable
MIFARE_READER_ENABLE=0x01
###############################################################################
# File name for Firmware
NXP_FW_NAME="libsn100u_fw.so"
###############################################################################
# System clock source selection configuration
#define CLK_SRC_XTAL 1
#define CLK_SRC_PLL 2
NXP_SYS_CLK_SRC_SEL=0x02
###############################################################################
# System clock frequency selection configuration
#define CLK_FREQ_13MHZ 1
#define CLK_FREQ_19_2MHZ 2
#define CLK_FREQ_24MHZ 3
#define CLK_FREQ_26MHZ 4
#define CLK_FREQ_38_4MHZ 5
#define CLK_FREQ_52MHZ 6
NXP_SYS_CLK_FREQ_SEL=0x05
###############################################################################
# The timeout value to be used for clock request acknowledgment
# min value = 0x01 to max = 0x06
#NXP_SYS_CLOCK_TO_CFG=0x06
###############################################################################
# The delay to try to start PLL/XTAL when using sys clock 256/fc units = ~18.8 us
# min value = 0x01 to max = 0x1F
#NXP_CLOCK_REQ_DELAY=0x16
###############################################################################
# NXP proprietary settings
NXP_ACT_PROP_EXTN={2F, 02, 00}
###############################################################################
# NFC forum profile settings
NXP_NFC_PROFILE_EXTN={20, 02, 05, 01, A0, 44, 01, 00}
###############################################################################
# NXP TVDD configurations settings
# Allow NFCC to configure External TVDD, two configurations (1 and 2) supported,
# out of them only one can be configured at a time.
#NXP_EXT_TVDD_CFG=0x02
###############################################################################
#config1:SLALM, 3.3V for both RM and CM
#NXP_EXT_TVDD_CFG_1={20, 02, 0F, 01, A0, 0E, 0B, 31, 01, 01, 31, 00, 00, 00, 01, 00, D0, 0C}
###############################################################################
#config2: use DCDC in CE, use Tx_Pwr_Req, set CFG2 mode, SLALM,
#monitoring 5V from DCDC, 3.3V for both RM and CM, DCDCWaitTime=4.2ms
#NXP_EXT_TVDD_CFG_2={20, 02, 0F, 01, A0, 0E, 0B, 11, 01, C2, B2, 00, B2, 1E, 1F, 00, D0, 0C}
###############################################################################
# Core configuration rf field filter settings to enable set to 01 to disable set
# to 00 last bit
#NXP_CORE_RF_FIELD={ 20, 02, 05, 01, A0, 62, 01, 00 }
###############################################################################
# To enable i2c fragmentation set i2c fragmentation enable 0x01 to disable set
# to 0x00
#NXP_I2C_FRAGMENTATION_ENABLED=0x00
###############################################################################
#set autonomous mode
# disable autonomous 0x00
# enable autonomous 0x01
NXP_CORE_SCRN_OFF_AUTONOMOUS_ENABLE=0x00
###############################################################################
#Enable SWP full power mode when phone is power off
#NXP_SWP_FULL_PWR_ON=0x00
################################################################################
#This is used to configure UICC2 or UICC3 at boot time.
# UICC2 0x04
# UICC3 0x08
NXP_DEFAULT_UICC2_SELECT=0x04
###############################################################################
# CE when Screen state is locked
# This setting is for DEFAULT_AID_ROUTE,
# DEFAULT_DESFIRE_ROUTE and DEFAULT_MIFARE_CLT_ROUTE
# Disable 0x00
# Enable 0x01
NXP_CE_ROUTE_STRICT_DISABLE=0x01
###############################################################################
#Timeout in secs to get NFCEE Discover notification
NXP_DEFAULT_NFCEE_DISC_TIMEOUT=20
###############################################################################
NXP_DEFAULT_NFCEE_TIMEOUT=20
###############################################################################
#Timeout in secs
NXP_SWP_RD_START_TIMEOUT=0x0A
###############################################################################
#Timeout in secs
NXP_SWP_RD_TAG_OP_TIMEOUT=0x01
###############################################################################
#Set the default AID route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_AID_ROUTE=0x01
###############################################################################
#Set the Mifare Desfire route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_DESFIRE_ROUTE=0x01
###############################################################################
#Set the Mifare CLT route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_MIFARE_CLT_ROUTE=0x01
###############################################################################
#Set the Felica CLT route Location :
#This settings will be used when application does not set this parameter
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_FELICA_CLT_ROUTE=0x01
###############################################################################
#Set the default AID Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen On lock
# bit pos 4 = Screen off unlock
# bit pos 5 = Screen Off lock
DEFAULT_AID_PWR_STATE=0x39
###############################################################################
#Set the Mifare Desfire Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen On lock
# bit pos 4 = Screen off unlock
# bit pos 5 = Screen Off lock
DEFAULT_DESFIRE_PWR_STATE=0x3B
###############################################################################
#Set the Mifare CLT Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen On lock
# bit pos 4 = Screen off unlock
# bit pos 5 = Screen Off lock
DEFAULT_MIFARE_CLT_PWR_STATE=0x3B
###############################################################################
#Set the Felica CLT Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen On lock
# bit pos 4 = Screen off unlock
# bit pos 5 = Screen Off lock
DEFAULT_FELICA_CLT_PWR_STATE=0x3B
###############################################################################
#Set the default Felica T3T System Code OffHost route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_SYS_CODE_ROUTE=0xC0
###############################################################################
# AID Matching platform options
# AID_MATCHING_L 0x01
# AID_MATCHING_K 0x02
#AID_MATCHING_PLATFORM=0x01
###############################################################################
# P61 interface options
# NFC 0x01
# SPI 0x02
NXP_P61_LS_DEFAULT_INTERFACE=0x01
###############################################################################
# P61 LTSM interface options
# NFC 0x01
# SPI 0x02
NXP_P61_LTSM_DEFAULT_INTERFACE=0x01
###############################################################################
#CHINA_TIANJIN_RF_SETTING
#Enable 0x01
#Disable 0x00
#NXP_CHINA_TIANJIN_RF_ENABLED=0x01
###############################################################################
#SWP_SWITCH_TIMEOUT_SETTING
# Allowed range of swp timeout setting is 0x00 to 0x3C [0 - 60].
# Timeout in milliseconds, for example
# No Timeout 0x00
# 10 millisecond timeout 0x0A
#NXP_SWP_SWITCH_TIMEOUT=0x0A
###############################################################################
# Flashing Options Configurations
# FLASH_UPPER_VERSION 0x01
# FLASH_DIFFERENT_VERSION 0x02
# FLASH_ALWAYS 0x03
NXP_FLASH_CONFIG=0x01
###############################################################################
# P61 interface options for JCOP Download
# NFC 0x01
# SPI 0x02
NXP_P61_JCOP_DEFAULT_INTERFACE=0x01
###############################################################################
# Option to perform LS update every boot
# Enable 0x01
# Disable 0x00
NXP_LS_FORCE_UPDATE_REQUIRED=0x00
###############################################################################
# Option to perform JCOP update every boot
# Enable 0x01
# Disable 0x00
NXP_JCOP_FORCE_UPDATE_REQUIRED=0x00
###############################################################################
# P61 JCOP OS download options
# FRAMEWORK API BY APPLICATION 0x00
# AT BOOT_TIME 0x01
NXP_JCOPDL_AT_BOOT_ENABLE=0x00
###############################################################################
# Loader service version
# NFC service checks for LS version 2.0 or 2.1
# LS2.0 0x20
# LS2.1 0x21
# LS2.2 0x22
# AT NFC service intialization
NXP_LOADER_SERVICE_VERSION=0x22
###############################################################################
#Timeout value in milliseconds for NFCC standby mode.The range is between 5000
#msec to 20000 msec and zero is to disable.
NXP_NFCC_STANDBY_TIMEOUT=20000
###############################################################################
#Dynamic RSSI feature enable
# Disable 0x00
# Enable 0x01
NXP_AGC_DEBUG_ENABLE=0x00
###############################################################################
#Virtual Mode ESE and Wired Mode ongoing delay Wired Mode
# For Technology routing to ESE Technology Mask = 4
# For ISO-DEP Protocol routing to ESE Mask = 2
# It can also take TECH|PROTO = 6
# To ignore the delay set mask to = 0
#NXP_ESE_WIRED_PRT_MASK=0x00
###############################################################################
#Virtual Mode UICC and Wired Mode ongoing delay Wired Mode
#For Technology routing to UICC Technology Mask = 4
#For ISO-DEP Protocol routing to UICC set Mask = 2
#For Select AID Routing to UICC set Mask = 1
#It can also take values TECH|PROTO|SELECT_AID = 7 , 6 , 5 ,3 .To ignore delay
#set mask = 0
#NXP_UICC_WIRED_PRT_MASK=0x00
################################################################################
#RF field true delay Wired Mode
# delay wired mode = 1
# allow wired mode = 0
#NXP_WIRED_MODE_RF_FIELD_ENABLE=0x00
###############################################################################
#Config to allow adding aids
#NFC on/off is required after this config
#1 = enabling adding aid to NFCC routing table.
#0 = disabling adding aid to NFCC routing table.
NXP_ENABLE_ADD_AID=0x01
###############################################################################
# JCOP-3.3 continuous process timeout in msec and value should be in Hexadecimal
# JCOP CP TIMEOUT
NXP_CP_TIMEOUT={00, 77}
###############################################################################
# Bail out mode
# If set to 1, NFCC is using bail out mode for either Type A or Type B poll.
NFA_POLL_BAIL_OUT_MODE=0x01
###############################################################################
# Enable/Disable Block Route feature.
# Block Route will restrict routing to first matched rule
# Block Route enable 0x01
# Block Route disable 0x00
NFA_BLOCK_ROUTE=0x00
###############################################################################
# White list of Hosts
# This values will be the Hosts(NFCEEs) in the HCI Network.
DEVICE_HOST_WHITE_LIST={C0, 80}
###############################################################################
# Choose the presence-check algorithm for type-4 tag. If not defined, the default value is 1.
# 0 NFA_RW_PRES_CHK_DEFAULT; Let stack selects an algorithm
# 1 NFA_RW_PRES_CHK_I_BLOCK; ISO-DEP protocol's empty I-block
# 2 NFA_RW_PRES_CHK_ISO_DEP_NAK; Type - 4 tag protocol iso-dep nak presence check
# command is sent waiting for rsp and ntf.
PRESENCE_CHECK_ALGORITHM=2
###############################################################################
# Enable/Disable checking default proto SE Id
# Disable 0x00
# Enable 0x01
NXP_CHECK_DEFAULT_PROTO_SE_ID=0x01
###############################################################################
# Vendor Specific Proprietary Protocol & Discovery Configuration
# Set to 0xFF if unsupported
# byte[0] NCI_PROTOCOL_18092_ACTIVE
# byte[1] NCI_PROTOCOL_B_PRIME
# byte[2] NCI_PROTOCOL_DUAL
# byte[3] NCI_PROTOCOL_15693
# byte[4] NCI_PROTOCOL_KOVIO
# byte[5] NCI_PROTOCOL_MIFARE
# byte[6] NCI_DISCOVERY_TYPE_POLL_KOVIO
# byte[7] NCI_DISCOVERY_TYPE_POLL_B_PRIME
# byte[8] NCI_DISCOVERY_TYPE_LISTEN_B_PRIME
NFA_PROPRIETARY_CFG={05, FF, FF, 06, 81, 80, 70, FF, FF}
###############################################################################
# SVDD sync off Delay in ms it can be max 20 ms
# If out of range timeout used, default delay of 10ms will be set
#NXP_SVDD_SYNC_OFF_DELAY=10
###############################################################################
#NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE
#Enable/Disable block number checks for china transit use case
#Enable 0x01
#Disable 0x00
#NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE=0x01
###############################################################################
#This config will enable different level of Rf transaction debugs based on the
#following values provided. Decoded information will be printed in adb logcat
#Debug Mode Levels
#Disable Debug 0x00
#L1 Debug 0x01
#L2 Debug 0x02
#L1 & L2 Debug 0x03
#L1 & L2 & RSSI 0x04
#L1 & L2 & Felica 0x05
NXP_CORE_PROP_SYSTEM_DEBUG=0x00
###############################################################################
#Enable NXP NCI runtime parser library
#Enable 0x01
#Disable 0x00
NXP_NCI_PARSER_LIBRARY=0x00
###############################################################################
# Wired mode resume timeout vaule in wired mode resume feature enable
# DWP resume time out in ms( 4 bytes hex value and LSB first)
#example 1000 = 0x03E8
#exmaple 2000 = 0x07D0
#example 500 = 0x01F4
#NXP_WIREDMODE_RESUME_TIMEOUT={E8,03,00,00}
###############################################################################
# Power to eSE is controlled by DH or PMU depending on following configurations
#define DH_PWR_CONTROL 1
#define PMU_PWR_CONTROL 2
#NXP_ESE_POWER_DH_CONTROL=1
###############################################################################
# Timeout value in milliseconds for wired mode resume after RF field event timeout
#NXP_NFCC_RF_FIELD_EVENT_TIMEOUT=3000
###############################################################################
# NXP PMU Support configuration is sent if PMU_PWR_CONTROL is configured
# External PMU available in phone ON and phone OFF case if NXP_ESE_POWER_EXT_PMU=1
# External PMU available only in phone ON case if NXP_ESE_POWER_EXT_PMU=2
#NXP_ESE_POWER_EXT_PMU=2
###############################################################################
# Whether to allow wired mode in desfire and mifare CLT
# Disable 0x00
# Enable 0x01
#NXP_ALLOW_WIRED_IN_MIFARE_DESFIRE_CLT=0x00
###############################################################################
# Send DWP interface reset command as part of SE open
# Disable 0x00
# Enable 0x01
NXP_DWP_INTF_RESET_ENABLE=0x00
###############################################################################
# Timeout value in milliseconds for JCOP OS download to complete
OS_DOWNLOAD_TIMEOUT_VALUE=60000
###############################################################################
# Timeout value in milliseconds to send response for Felica command received
NXP_HCEF_CMD_RSP_TIMEOUT_VALUE=5000
###############################################################################
# Forcing HOST to listen for a selected protocol
# 0x00 : Disable Host Listen
# 0x01 : Enable Host to Listen (A) for ISO-DEP tech A
# 0x02 : Enable Host to Listen (B) for ISO-DEP tech B
# 0x04 : Enable Host to Listen (F) for T3T Tag Type Protocol tech F
# 0x07 : Enable Host to Listen (ABF)for ISO-DEP tech AB & T3T Tag Type Protocol tech F
HOST_LISTEN_TECH_MASK=0x07
###############################################################################
# Enable forward functionality
# Disable 0x00
# Enable 0x01
FORWARD_FUNCTIONALITY_ENABLE=0x01
###############################################################################
# Configure the NFC Extras to open and use a static pipe. If the value is
# not set or set to 0, then the default is use a dynamic pipe based on a
# destination gate (see NFA_HCI_DEFAULT_DEST_GATE). Note there is a value
# for each EE (ESE/SIM)
OFF_HOST_ESE_PIPE_ID=0x19
OFF_HOST_SIM_PIPE_ID=0x70
###############################################################################
#Set the Felica T3T System Code Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen On lock
# bit pos 4 = Screen off unlock
# bit pos 5 = Screen Off lock
DEFAULT_SYS_CODE_PWR_STATE=0x39
###############################################################################
#Default Secure Element route id
DEFAULT_OFFHOST_ROUTE=0x02
###############################################################################
#Maximum SMB transceive wait for response
NXP_SMB_TRANSCEIVE_TIMEOUT=2000
###############################################################################
# Firmware file type
#.so file 0x01
#.bin file 0x02
NXP_FW_TYPE=0x01
############################################################################
# Extended APDU length for ISO_DEP
ISO_DEP_MAX_TRANSCEIVE=0xFEFF
#########################################################################
# Support for Amendment I SEMS specification
# Support SEMS Amendment I 0x01
# Support NXP LS client 0x00
NXP_GP_AMD_I_SEMS_SUPPORTED=0x01
#########################################################################
# Enable/Disable default route to host in case default se is not active
# Disable feature 0x00
# Enable feature 0x01
NXP_CHECK_DEFAULT_PROTO_SE_ID=0x01
###############################################################################
# Assign terminal number to each interface based on system config
NXP_SPI_SE_TERMINAL_NUM="eSE1"
###############################################################################
#########################################################################
# Assign terminal number to each interface based on system config
NXP_VISO_SE_TERMINAL_NUM="eSE3"
###############################################################################
#########################################################################
# Assign terminal number to each interface based on system config
NXP_NFC_SE_TERMINAL_NUM="eSE2"
###############################################################################
############################
## libnfc-nxp_RF.conf
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#PMU_CFG
NXP_RF_CONF_BLK_1={20, 02, 30, 01,
A0, 0E, 2C, F0, 00, 3E, 11, E4, E4, E4, 00, 00, 00, 00, 00, A7, 8E, FF, FF,
23, 23, 23, 23, 0A, 00, 00, 00, 00, 02, 00, 00, 01, 00, 10, 00, 04, 00, 00,
00, 17, 40, FF, 07, 13, 07, 05, 13
}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#DPC_SETTINGS
NXP_RF_CONF_BLK_2={20, 02, B6, 01,
A0, 0B, B2, 00, 00, 00, 14, 6A, 2A, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00,
00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00,
00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00,
00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00,
00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00,
00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00,
00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00,
00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00,
00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00,
00, 00, 00, 00, 00, 00, 00, 00, 00, 00
}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
NXP_RF_CONF_BLK_3={20, 02, 2E, 05,
A0, 0D, 06, 10, 84, 30, 00, 00, 00,
A0, 0D, 06, 10, 60, 34, C9, 04, 00,
A0, 0D, 06, 60, 4E, FF, FF, FF, 01,
A0, 0D, 06, 60, 4F, FF, FF, FF, 01,
A0, 0D, 06, 60, 50, FF, FF, FF, 3F
}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_4={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_5={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_6={
#}
NXP_RF_CONF_MAX_NUM=3
###############################################################################
# Core configuration extensions
# It includes
# Wired mode settings A0ED, A0EE
# Tag Detector A040, A041, A043
# Low Power mode A007
# Clock settings A002, A003
# PbF settings A008
# Clock timeout settings A004
# eSE (SVDD) PWR REQ settings A0F2
# Window size A0D8
# DWP Speed A0D5
# How eSE connected to PN553 A012
# UICC2 bit rate A0D1
# SWP1A interface A0D4
# DWP intf behavior config, SVDD Load activated by default if set to 0x31 A037
NXP_CORE_CONF_EXTN={20, 02, 09, 02,
A0, EC, 01, 01,
A0, ED, 01, 01
}
# A0, 40, 01, 00
# A0, F2, 01, 01,
# A0, 41, 01, 02,
# A0, 43, 01, 04,
# A0, 02, 01, 01,
# A0, 03, 01, 11,
# A0, 07, 01, 03,
# A0, 08, 01, 01
# }
###############################################################################
# Core configuration settings
NXP_CORE_CONF={ 20, 02, 30, 10,
28, 01, 00,
21, 01, 00,
30, 01, 04,
31, 01, 00,
32, 01, 60,
38, 01, 01,
33, 00,
54, 01, 06,
50, 01, 02,
5B, 01, 00,
80, 01, 01,
81, 01, 01,
82, 01, 0E,
18, 01, 01,
68, 01, 01,
85, 01, 01
}
###############################################################################

View File

@@ -1,622 +0,0 @@
#################### This file is used by NXP NFC NCI HAL #####################
###############################################################################
# Application options
# Logging Levels
# NXPLOG_DEFAULT_LOGLEVEL 0x01
# ANDROID_LOG_DEBUG 0x04
# ANDROID_LOG_INFO 0x03
# ANDROID_LOG_WARN 0x02
# ANDROID_LOG_ERROR 0x01
# ANDROID_LOG_SILENT 0x00
NXPLOG_EXTNS_LOGLEVEL=0x04
NXPLOG_NCIHAL_LOGLEVEL=0x04
NXPLOG_NCIX_LOGLEVEL=0x04
NXPLOG_NCIR_LOGLEVEL=0x04
NXPLOG_FWDNLD_LOGLEVEL=0x04
NXPLOG_TML_LOGLEVEL=0x04
NFC_DEBUG_ENABLED=1
###############################################################################
# Nfc Device Node name
NXP_NFC_DEV_NODE="/dev/nq-nci"
#################################################################################
#VEN Toggle Config
#Disable = 0x00
#Enable = 0x01
ENABLE_VEN_TOGGLE=0x00
###############################################################################
# Extension for Mifare reader enable
MIFARE_READER_ENABLE=0x01
###############################################################################
# Mifare Reader implementation
# 0: General implementation
# 1: Legacy implementation
LEGACY_MIFARE_READER=0
###############################################################################
# System clock source selection configuration
#define CLK_SRC_XTAL 1
#define CLK_SRC_PLL 2
NXP_SYS_CLK_SRC_SEL=0x02
###############################################################################
# System clock frequency selection configuration
#define CLK_FREQ_13MHZ 1
#define CLK_FREQ_19_2MHZ 2
#define CLK_FREQ_24MHZ 3
#define CLK_FREQ_26MHZ 4
#define CLK_FREQ_38_4MHZ 5
#define CLK_FREQ_52MHZ 6
NXP_SYS_CLK_FREQ_SEL=0x02
###############################################################################
# The timeout value to be used for clock request acknowledgment
# min value = 0x01 to max = 0x06
#NXP_SYS_CLOCK_TO_CFG=0x06
###############################################################################
# The delay to try to start PLL/XTAL when using sys clock 256/fc units = ~18.8 us
# min value = 0x01 to max = 0x1F
#NXP_CLOCK_REQ_DELAY=0x16
###############################################################################
# NXP proprietary settings
NXP_ACT_PROP_EXTN={2F, 02, 00}
###############################################################################
# NXP TVDD configurations settings
# Allow NFCC to configure External TVDD, two configurations (1 and 2) supported,
# out of them only one can be configured at a time.
NXP_EXT_TVDD_CFG=0x02
###############################################################################
#config1:SLALM, 3.3V for both RM and CM
#NXP_EXT_TVDD_CFG_1={20, 02, 0F, 01, A0, 0E, 0B, 31, 01, 01, 31, 00, 00, 00, 01, 00, D0, 0C}
###############################################################################
#config2: use DCDC in CE, use Tx_Pwr_Req, set CFG2 mode, SLALM,
#monitoring 5V from DCDC, 3.3V for both RM and CM, DCDCWaitTime=4.2ms
#NXP_EXT_TVDD_CFG_2={20, 02, 0F, 01, A0, 0E, 0B, 11, 01, C2, B2, 00, B2, 1E, 1F, 00, D0, 0C}
NXP_EXT_TVDD_CFG_2={20, 02, 30, 01, A0, 0E, 2C, F0, 00, 3E, 11, E4, E4, E4, 00, 00, 00, 00, 00, A7, 8E, FF, FF, 0F, 0F, 0F, 0F, 0A, 00, 00, 00, 00, 02, 00, 00, 01, 00, 10, 00, 04, 00, 00, 00, 17, 40, 20, 07, 13, 07, 05, 13}
###############################################################################
# MAX 20 RF configuration blocks are supported by MW.
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_1={
#}
###############################################################################
# By default, the LPCD shall be enabled.
# Please check the platform specific configuration and enable it.
# NXP_RF_CONF_BLK_1={
# 20, 02, 2E, 01,
# A0, 68, 2A, 06, 40, 60, 03, 19, 00, 00, 00, 00,
# 83, 04,
# 00,
# C0, 00, C0, 00,
# 00, 01, 00, 01,
# A0, 00, A0, 00,
# 03, FA, 00, 00, 00, 4C, 00, 14, 00, 7D, 00,
# 05,
# 7F, 00,
# 00, 01,00, 03
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_2={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_3={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_4={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_5={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_6={
#}
###############################################################################
# Set configuration optimization decision setting
# Enable = 0x01
# Disable = 0x00
NXP_SET_CONFIG_ALWAYS=0x01
###############################################################################
# Core configuration rf field filter settings to enable set to 01 to disable set to 00 last bit
#NXP_CORE_RF_FIELD={ 20, 02, 05, 01, A0, 62, 01, 00}
###############################################################################
# To enable i2c fragmentation set i2c fragmentation enable 0x01 to disable set
# to 0x00
#NXP_I2C_FRAGMENTATION_ENABLED=0x00
###############################################################################
# Core configuration extensions
# It includes
# Wired mode settings A0ED, A0EE
# Tag Detector A040, A041, A043
# Low Power mode A007
# Clock settings A002, A003
# PbF settings A008
# Clock timeout settings A004
# eSE (SVDD) PWR REQ settings A0F2
# Window size A0D8
# DWP Speed A0D5
# How eSE connected to PN553 A012
# UICC2 bit rate A0D1
# SWP1A interface A0D4
# DWP intf behavior config, SVDD Load activated by default if set to 0x31 A037
# Low power tag detection LPTD for power reduction A068
NXP_CORE_CONF_EXTN={20, 02, 3A, 04,
A0, EC, 01, 01,
A0, ED, 01, 01,
A0, 68, 2A, 06, 40, 60, 03, 19, 00, 00, 00, 00, 82, 04, 00, 00, 02, 00, 0F, 00, 02, 00, 0F, A0, 00, A0, 00, 03, FA, 00, 00, 00, 4C, 00, 14, 00, 7D, 00, 05, 7F, 00, 00, 01, 00, 03,
A0, 0A, 01, 20
}
# A0, F2, 01, 01,
# A0, 40, 01, 01,
# A0, 41, 01, 02,
# A0, 43, 01, 04,
# A0, 02, 01, 01,
# A0, 03, 01, 11,
# A0, 07, 01, 03,
# A0, 08, 01, 01
# }
###############################################################################
# Core configuration settings
NXP_CORE_CONF={ 20, 02, 37, 11,
28, 01, 00,
21, 01, 00,
30, 01, 08,
31, 01, 03,
32, 01, 60,
38, 01, 01,
33, 04, 01, 02, 03, 04,
54, 01, 06,
50, 01, 02,
5B, 01, 00,
3E, 01, 00,
80, 01, 01,
81, 01, 01,
82, 01, 0E,
18, 01, 01,
68, 01, 01,
85, 01, 01
}
###############################################################################
#set autonomous mode
# disable autonomous 0x00
# enable autonomous 0x01
NXP_AUTONOMOUS_ENABLE=0x00
###############################################################################
#set Guard Timer
# Gurad Timer range to 0x0F-0xFF(i.e.15-255 seconds)
NXP_GUARD_TIMER_VALUE=0x0F
###############################################################################
#Enable SWP full power mode when phone is power off
#NXP_SWP_FULL_PWR_ON=0x00
################################################################################
#This is used to configure UICC2 at boot time.
# UICC2 0x03
NXP_DEFAULT_UICC2_SELECT=0x03
###############################################################################
# CE when Screen state is locked
# This setting is for DEFAULT_AID_ROUTE,
# DEFAULT_DESFIRE_ROUTE and DEFAULT_MIFARE_CLT_ROUTE
# Disable 0x00
# Enable 0x01
NXP_CE_ROUTE_STRICT_DISABLE=0x01
###############################################################################
#SCR Read Tag Operation Timeout in secs
NXP_SWP_RD_TAG_OP_TIMEOUT=20
###############################################################################
#Set the default AID route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_AID_ROUTE=0x01
###############################################################################
#Set the ISODEP (Mifare Desfire) route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_ISODEP_ROUTE=0x01
###############################################################################
#Set the Mifare CLT route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_MIFARE_CLT_ROUTE=0x01
###############################################################################
#Set the Felica CLT route Location :
#This settings will be used when application does not set this parameter
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_FELICA_CLT_ROUTE=0x01
###############################################################################
#Set the default AID Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_AID_PWR_STATE=0x39
###############################################################################
#Set the Mifare Desfire Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_DESFIRE_PWR_STATE=0x3B
###############################################################################
#Set the Mifare CLT Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_MIFARE_CLT_PWR_STATE=0x3B
###############################################################################
#Set the Felica CLT Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_FELICA_CLT_PWR_STATE=0x3B
###############################################################################
#Set the T4TNfcee AID Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_T4TNFCEE_AID_POWER_STATE=0x3B
###############################################################################
#Set the default Felica T3T System Code OffHost route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_SYS_CODE_ROUTE=0x00
###############################################################################
# AID Matching platform options
# AID_MATCHING_L 0x01
# AID_MATCHING_K 0x02
#AID_MATCHING_PLATFORM=0x01
###############################################################################
# P61 interface options
# SPI 0x02
NXP_P61_LS_DEFAULT_INTERFACE=0x00
###############################################################################
#CHINA_TIANJIN_RF_SETTING
#Enable 0x01
#Disable 0x00
#NXP_CHINA_TIANJIN_RF_ENABLED=0x01
###############################################################################
#SWP_SWITCH_TIMEOUT_SETTING
# Allowed range of swp timeout setting is 0x00 to 0x3C [0 - 60].
# Timeout in milliseconds, for example
# No Timeout 0x00
# 10 millisecond timeout 0x0A
#NXP_SWP_SWITCH_TIMEOUT=0x0A
###############################################################################
# Flashing Options Configurations
# FLASH_UPPER_VERSION 0x01
# FLASH_DIFFERENT_VERSION 0x02
# FLASH_ALWAYS 0x03
NXP_FLASH_CONFIG=0x02
###############################################################################
# P61 interface options for JCOP Download
# SPI 0x02
NXP_P61_JCOP_DEFAULT_INTERFACE=0x00
###############################################################################
# Option to perform LS update every boot
# Enable 0x01
# Disable 0x00
NXP_LS_FORCE_UPDATE_REQUIRED=0x00
###############################################################################
# Option to perform JCOP update every boot
# Enable 0x01
# Disable 0x00
NXP_JCOP_FORCE_UPDATE_REQUIRED=0x00
###############################################################################
# Bail out mode
# If set to 1, NFCC is using bail out mode for either Type A or Type B poll.
# Set this parameter value to 1 if Android Beam is enabled, else set to 0.
NFA_POLL_BAIL_OUT_MODE=0x00
###############################################################################
# White list of Hosts
# This values will be the Hosts(NFCEEs) in the HCI Network.
DEVICE_HOST_WHITE_LIST={C0, 80}
###############################################################################
# Choose the presence-check algorithm for type-4 tag. If not defined, the default value is 1.
# 0 NFA_RW_PRES_CHK_DEFAULT; Let stack selects an algorithm
# 1 NFA_RW_PRES_CHK_I_BLOCK; ISO-DEP protocol's empty I-block
# 2 NFA_RW_PRES_CHK_ISO_DEP_NAK; Type - 4 tag protocol iso-dep nak presence check
# command is sent waiting for rsp and ntf.
PRESENCE_CHECK_ALGORITHM=2
###############################################################################
# Options to Fallback to alternative route
# DH 0x01
# ESE 0x02
NXP_CHECK_DEFAULT_PROTO_SE_ID=0x01
###############################################################################
# Vendor Specific Proprietary Protocol & Discovery Configuration
# Set to 0xFF if unsupported
# byte[0] NCI_PROTOCOL_18092_ACTIVE
# byte[1] NCI_PROTOCOL_B_PRIME
# byte[2] NCI_PROTOCOL_DUAL
# byte[3] NCI_PROTOCOL_15693
# byte[4] NCI_PROTOCOL_KOVIO
# byte[5] NCI_PROTOCOL_MIFARE
# byte[6] NCI_DISCOVERY_TYPE_POLL_KOVIO
# byte[7] NCI_DISCOVERY_TYPE_POLL_B_PRIME
# byte[8] NCI_DISCOVERY_TYPE_LISTEN_B_PRIME
NFA_PROPRIETARY_CFG={05, FF, FF, 06, 81, 80, FF, FF, FF}
###############################################################################
#NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE
#Enable/Disable block number checks for china transit use case
#Enable 0x01
#Disable 0x00
#NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE=0x01
################################################################################
#This flags will enable different modes of Lx Debug based on bits of the Byte0
#Byte 0:
# |_________Bit Mask_______| Debug Mode
# b7|b6|b5|b4|b3|b2|b1|b0|
# | |x | | | | | | Modulation Detected Notification
# | | |X | | | | | Enable L1 Events (ISO14443-4, ISO18092)
# | | | |X | | | | Enable L2 Reader Events(ROW specific)
# | | | | |X | | | Enable Felica SystemCode
# | | | | | |X | | Enable Felica RF (all Felica CM events)
# | | | | | | |X | Enable L2 Events CE (ISO14443-3, RF Field ON/OFF)
#Byte 1: RFU, shall always be 0x00
# Byte1 Byte0
# \__ __/
# e.g. NXP_CORE_PROP_SYSTEM_DEBUG=0x0031 ==> Modulation detected, L1, L2 CE
NXP_CORE_PROP_SYSTEM_DEBUG=0x0000
###############################################################################
#Enable NXP NCI runtime parser library
#Enable 0x01
#Disable 0x00
NXP_NCI_PARSER_LIBRARY=0x00
###############################################################################
# Timeout value in milliseconds for JCOP OS download to complete
OS_DOWNLOAD_TIMEOUT_VALUE=60000
###############################################################################
# Forcing HOST to listen for a selected protocol
# 0x00 : Disable Host Listen
# 0x01 : Enable Host to Listen (A) for ISO-DEP tech A
# 0x02 : Enable Host to Listen (B) for ISO-DEP tech B
# 0x04 : Enable Host to Listen (F) for T3T Tag Type Protocol tech F
# 0x07 : Enable Host to Listen (ABF)for ISO-DEP tech AB & T3T Tag Type Protocol tech F
HOST_LISTEN_TECH_MASK=0x07
###############################################################################
# Enable forward functionality
# Disable 0x00
# Enable 0x01 //Any positive value as per below bit configuration
# HOST power states when type A/B only UICC present
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
FORWARD_FUNCTIONALITY_ENABLE=0x01
###############################################################################
# Configure the NFC Extras to open and use a static pipe. If the value is
# not set or set to 0, then the default is use a dynamic pipe based on a
# destination gate (see NFA_HCI_DEFAULT_DEST_GATE). Note there is a value
# for each EE (ESE/SIM1/SIM2)
OFF_HOST_ESE_PIPE_ID=0x16
OFF_HOST_SIM_PIPE_ID=0x0A
OFF_HOST_SIM2_PIPE_ID=0x23
###############################################################################
#Set the Felica T3T System Code Power state :
#This settings will be used when application does not set this parameter
#Update Power state as per NCI2.0
DEFAULT_SYS_CODE_PWR_STATE=0x00
###############################################################################
#Default Secure Element route id
DEFAULT_OFFHOST_ROUTE=0x01
###############################################################################
#Maximum SMB transceive wait for response
NXP_SMB_TRANSCEIVE_TIMEOUT=2000
###############################################################################
# Firmware file type
#.so file 0x01
#.bin file 0x02
NXP_FW_TYPE=0x01
############################################################################
# Extended APDU length for ISO_DEP
ISO_DEP_MAX_TRANSCEIVE=0xFEFF
#########################################################################
# Support for Amendment I SEMS specification
# Support SEMS Amendment I 0x01
# Support NXP LS client 0x00
NXP_GP_AMD_I_SEMS_SUPPORTED=0x01
###############################################################################
#All eSE terminals shall be match with the /vendor/etc/vintf/manifest.xml file
#under android.hardware.secure_element
# The terminal name shall start from 1
# Assign terminal number to each interface based on system config
NXP_SPI_SE_TERMINAL_NUM="eSE1"
###############################################################################
# Assign terminal number to each interface based on system config
#NXP_VISO_SE_TERMINAL_NUM="eSE3"
###############################################################################
# Assign terminal number to each interface based on system config
NXP_NFC_SE_TERMINAL_NUM="eSE2"
###############################################################################
#For static or dynamic dual UICC feature support
#Enable static dual uicc feature by setting value 0x00
#Enable dynamic dual uicc feature by setting value 0x01
NXP_DUAL_UICC_ENABLE=0x01
###############################################################################
# Time to wait by DH when NFCC will report eSE Cold Temp Error.
# The value is as per the UM and in seconds
NXP_SE_COLD_TEMP_ERROR_DELAY=0x05
###############################################################################
#OffHost ESE route location for MultiSE
#ESE = 01
OFFHOST_ROUTE_ESE={01}
###############################################################################
#OffHost UICC route location for MultiSE
#UICC1 = 02
#UICC2 = 03
OFFHOST_ROUTE_UICC={02:03}
###############################################################################
#T4T NFCEE ENABLE
#bit pos 0 = T4T NFCEE Enable
#bit pos 6 = T4T NFCEE Contactless write enable
NXP_T4T_NFCEE_ENABLE=0x01
###############################################################################
#CORE_SET_CONF_CMD to reset Prop Emvco Flag
NXP_PROP_RESET_EMVCO_CMD={20, 02, 05, 01, A0, 44, 01, 00}
###############################################################################
#Guard time in ms for the mPOS/SCR module to process the reader start/stop req
NXP_RDR_REQ_GUARD_TIME=0
###############################################################################
#MW workaround to enable LPCD when EMVCO polling mode starts and disable
#while switching back to NFC Forum mode
# 0 --> Disable MW workaround
# 1 --> Enable MW workaround
# 2 --> Use this option only for FW versions below 1.10.52
NXP_RDR_DISABLE_ENABLE_LPCD=0
###############################################################################
# Firmware patch format, Only 1 and 5 should be set
# 0 -> NFC Default
# 1 -> EMVCO Default
# 3 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = Removal process
# 5 -> EMVCO Cert Polling, DISC_IDLE = Removal process , DISC DEACTIVATE = POWER_OFF
# 7 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = POWER_OFF
NFA_CONFIG_FORMAT=1
#################################################################################
# Enable disconnect tag in screen off
# Disable 0x00
# Enable 0x01
NXP_DISCONNECT_TAG_IN_SCRN_OFF=0x01
#################################################################################
###############################################################################
# Enable(0x01) or disable(0x00) non-standard tag reading
# Disable Non-standard card read 0x00
# Enable Non-standard card read 0x01
NXP_SUPPORT_NON_STD_CARD=0x00
#################################################################################
# Enable(0x01) or disable(0x00 ) for getting HW Info log over SMB wired
# Disable getting HW info log 0x00
# Enable getting HW info log 0x01
NXP_GET_HW_INFO_LOG=0x00
#################################################################################
# Enable(0x01) or disable(0x00) iso dep sak merge
# Disable SAK merging 0x00
# Enable SAK merging 0x01
NXP_ISO_DEP_MERGE_SAK=0x01
#################################################################################
# Valid time difference range within for non-standard tag detection from first
# Activation fail to next discovery
# Note :- 1. This will take effect only when NXP_SUPPORT_NON_STD_CARD is enabled
# 2. The number will be multiplied by 100ms by MW.
# Default:
# Set to 00 if not supported
# byte[0] MIFARE_CLASSIC 100ms
# byte[1] ISO_DEP 300ms
NXP_NON_STD_CARD_TIMEDIFF={01, 03}
#################################################################################
# Enable or Disable UICC ETSI support
# Disable UICC ETSI support 0
# Enable UICC ETSI support 1
NXP_UICC_ETSI_SUPPORT=0
#################################################################################
# Minimal FW Version used for recovery
NXP_MINIMAL_FW_VERSION=0x110DE
#################################################################################
# Enable Stop/Start of RF discovery for NFCEE recovery
# Disable RF Restart for NFCEE recovery 0
# Enable RF Restart for NFCEE recovery 1
NXP_RESTART_RF_FOR_NFCEE_RECOVERY=0
#################################################################################
# Enable or Disable the minimal FW recovery support.
# This logic will get enabled on early NFC hal boot.
# Disable NFCC RECOVERY support 0x00
# Enable NFCC RECOVERY support 0x01
NXP_NFCC_RECOVERY_SUPPORT=0x01
#################################################################################

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@@ -1,623 +0,0 @@
#################### This file is used by NXP NFC NCI HAL #####################
###############################################################################
# Application options
# Logging Levels
# NXPLOG_DEFAULT_LOGLEVEL 0x01
# ANDROID_LOG_DEBUG 0x04
# ANDROID_LOG_INFO 0x03
# ANDROID_LOG_WARN 0x02
# ANDROID_LOG_ERROR 0x01
# ANDROID_LOG_SILENT 0x00
NXPLOG_EXTNS_LOGLEVEL=0x04
NXPLOG_NCIHAL_LOGLEVEL=0x04
NXPLOG_NCIX_LOGLEVEL=0x04
NXPLOG_NCIR_LOGLEVEL=0x04
NXPLOG_FWDNLD_LOGLEVEL=0x04
NXPLOG_TML_LOGLEVEL=0x04
NFC_DEBUG_ENABLED=1
###############################################################################
# Nfc Device Node name
NXP_NFC_DEV_NODE="/dev/nq-nci"
#################################################################################
#VEN Toggle Config
#Disable = 0x00
#Enable = 0x01
ENABLE_VEN_TOGGLE=0x00
###############################################################################
# Extension for Mifare reader enable
MIFARE_READER_ENABLE=0x01
###############################################################################
# Mifare Reader implementation
# 0: General implementation
# 1: Legacy implementation
LEGACY_MIFARE_READER=0
###############################################################################
# System clock source selection configuration
#define CLK_SRC_XTAL 1
#define CLK_SRC_PLL 2
NXP_SYS_CLK_SRC_SEL=0x02
###############################################################################
# System clock frequency selection configuration
#define CLK_FREQ_13MHZ 1
#define CLK_FREQ_19_2MHZ 2
#define CLK_FREQ_24MHZ 3
#define CLK_FREQ_26MHZ 4
#define CLK_FREQ_32MHZ 5
#define CLK_FREQ_38_4MHZ 6
#define CLK_FREQ_52MHZ 7
NXP_SYS_CLK_FREQ_SEL=0x06
###############################################################################
# The timeout value to be used for clock request acknowledgment
# min value = 0x01 to max = 0x06
#NXP_SYS_CLOCK_TO_CFG=0x06
###############################################################################
# The delay to try to start PLL/XTAL when using sys clock 256/fc units = ~18.8 us
# min value = 0x01 to max = 0x1F
#NXP_CLOCK_REQ_DELAY=0x16
###############################################################################
# NXP proprietary settings
NXP_ACT_PROP_EXTN={2F, 02, 00}
###############################################################################
# NXP TVDD configurations settings
# Allow NFCC to configure External TVDD, two configurations (1 and 2) supported,
# out of them only one can be configured at a time.
NXP_EXT_TVDD_CFG=0x02
###############################################################################
#config1:SLALM, 3.3V for both RM and CM
#NXP_EXT_TVDD_CFG_1={20, 02, 0F, 01, A0, 0E, 0B, 31, 01, 01, 31, 00, 00, 00, 01, 00, D0, 0C}
###############################################################################
#config2: use DCDC in CE, use Tx_Pwr_Req, set CFG2 mode, SLALM,
#monitoring 5V from DCDC, 3.3V for both RM and CM, DCDCWaitTime=4.2ms
#NXP_EXT_TVDD_CFG_2={20, 02, 0F, 01, A0, 0E, 0B, 11, 01, C2, B2, 00, B2, 1E, 1F, 00, D0, 0C}
NXP_EXT_TVDD_CFG_2={20, 02, 30, 01, A0, 0E, 2C, F0, 00, 3E, 11, E4, E4, E4, 00, 00, 00, 00, 00, A7, 8E, FF, FF, 0F, 0F, 0F, 0F, 0A, 00, 00, 00, 00, 02, 00, 00, 01, 00, 10, 00, 04, 00, 00, 00, 17, 40, 20, 07, 13, 07, 05, 13}
###############################################################################
# MAX 20 RF configuration blocks are supported by MW.
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_1={
#}
###############################################################################
# By default, the LPCD shall be enabled.
# Please check the platform specific configuration and enable it.
# NXP_RF_CONF_BLK_1={
# 20, 02, 2E, 01,
# A0, 68, 2A, 06, 40, 60, 03, 19, 00, 00, 00, 00,
# 83, 04,
# 00,
# C0, 00, C0, 00,
# 00, 01, 00, 01,
# A0, 00, A0, 00,
# 03, FA, 00, 00, 00, 4C, 00, 14, 00, 7D, 00,
# 05,
# 7F, 00,
# 00, 01,00, 03
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_2={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_3={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_4={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_5={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_6={
#}
###############################################################################
# Set configuration optimization decision setting
# Enable = 0x01
# Disable = 0x00
NXP_SET_CONFIG_ALWAYS=0x01
###############################################################################
# Core configuration rf field filter settings to enable set to 01 to disable set to 00 last bit
#NXP_CORE_RF_FIELD={ 20, 02, 05, 01, A0, 62, 01, 00}
###############################################################################
# To enable i2c fragmentation set i2c fragmentation enable 0x01 to disable set
# to 0x00
#NXP_I2C_FRAGMENTATION_ENABLED=0x00
###############################################################################
# Core configuration extensions
# It includes
# Wired mode settings A0ED, A0EE
# Tag Detector A040, A041, A043
# Low Power mode A007
# Clock settings A002, A003
# PbF settings A008
# Clock timeout settings A004
# eSE (SVDD) PWR REQ settings A0F2
# Window size A0D8
# DWP Speed A0D5
# How eSE connected to PN553 A012
# UICC2 bit rate A0D1
# SWP1A interface A0D4
# DWP intf behavior config, SVDD Load activated by default if set to 0x31 A037
# Low power tag detection LPTD for power reduction A068
NXP_CORE_CONF_EXTN={20, 02, 3A, 04,
A0, EC, 01, 01,
A0, ED, 01, 01,
A0, 68, 2A, 06, 40, 60, 03, 19, 00, 00, 00, 00, 82, 04, 00, 00, 02, 00, 0F, 00, 02, 00, 0F, A0, 00, A0, 00, 03, FA, 00, 00, 00, 4C, 00, 14, 00, 7D, 00, 05, 7F, 00, 00, 01, 00, 03,
A0, 0A, 01, 20
}
# A0, F2, 01, 01,
# A0, 40, 01, 01,
# A0, 41, 01, 02,
# A0, 43, 01, 04,
# A0, 02, 01, 01,
# A0, 03, 01, 11,
# A0, 07, 01, 03,
# A0, 08, 01, 01
# }
###############################################################################
# Core configuration settings
NXP_CORE_CONF={ 20, 02, 37, 11,
28, 01, 00,
21, 01, 00,
30, 01, 08,
31, 01, 03,
32, 01, 60,
38, 01, 01,
33, 04, 01, 02, 03, 04,
54, 01, 06,
50, 01, 02,
5B, 01, 00,
3E, 01, 00,
80, 01, 01,
81, 01, 01,
82, 01, 0E,
18, 01, 01,
68, 01, 01,
85, 01, 01
}
###############################################################################
#set autonomous mode
# disable autonomous 0x00
# enable autonomous 0x01
NXP_AUTONOMOUS_ENABLE=0x00
###############################################################################
#set Guard Timer
# Gurad Timer range to 0x0F-0xFF(i.e.15-255 seconds)
NXP_GUARD_TIMER_VALUE=0x0F
###############################################################################
#Enable SWP full power mode when phone is power off
#NXP_SWP_FULL_PWR_ON=0x00
################################################################################
#This is used to configure UICC2 at boot time.
# UICC2 0x03
NXP_DEFAULT_UICC2_SELECT=0x03
###############################################################################
# CE when Screen state is locked
# This setting is for DEFAULT_AID_ROUTE,
# DEFAULT_DESFIRE_ROUTE and DEFAULT_MIFARE_CLT_ROUTE
# Disable 0x00
# Enable 0x01
NXP_CE_ROUTE_STRICT_DISABLE=0x01
###############################################################################
#SCR Read Tag Operation Timeout in secs
NXP_SWP_RD_TAG_OP_TIMEOUT=20
###############################################################################
#Set the default AID route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_AID_ROUTE=0x01
###############################################################################
#Set the ISODEP (Mifare Desfire) route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_ISODEP_ROUTE=0x01
###############################################################################
#Set the Mifare CLT route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_MIFARE_CLT_ROUTE=0x01
###############################################################################
#Set the Felica CLT route Location :
#This settings will be used when application does not set this parameter
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_FELICA_CLT_ROUTE=0x01
###############################################################################
#Set the default AID Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_AID_PWR_STATE=0x39
###############################################################################
#Set the Mifare Desfire Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_DESFIRE_PWR_STATE=0x3B
###############################################################################
#Set the Mifare CLT Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_MIFARE_CLT_PWR_STATE=0x3B
###############################################################################
#Set the Felica CLT Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_FELICA_CLT_PWR_STATE=0x3B
###############################################################################
#Set the T4TNfcee AID Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_T4TNFCEE_AID_POWER_STATE=0x3B
###############################################################################
#Set the default Felica T3T System Code OffHost route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_SYS_CODE_ROUTE=0x00
###############################################################################
# AID Matching platform options
# AID_MATCHING_L 0x01
# AID_MATCHING_K 0x02
#AID_MATCHING_PLATFORM=0x01
###############################################################################
# P61 interface options
# SPI 0x02
NXP_P61_LS_DEFAULT_INTERFACE=0x00
###############################################################################
#CHINA_TIANJIN_RF_SETTING
#Enable 0x01
#Disable 0x00
#NXP_CHINA_TIANJIN_RF_ENABLED=0x01
###############################################################################
#SWP_SWITCH_TIMEOUT_SETTING
# Allowed range of swp timeout setting is 0x00 to 0x3C [0 - 60].
# Timeout in milliseconds, for example
# No Timeout 0x00
# 10 millisecond timeout 0x0A
#NXP_SWP_SWITCH_TIMEOUT=0x0A
###############################################################################
# Flashing Options Configurations
# FLASH_UPPER_VERSION 0x01
# FLASH_DIFFERENT_VERSION 0x02
# FLASH_ALWAYS 0x03
NXP_FLASH_CONFIG=0x02
###############################################################################
# P61 interface options for JCOP Download
# SPI 0x02
NXP_P61_JCOP_DEFAULT_INTERFACE=0x00
###############################################################################
# Option to perform LS update every boot
# Enable 0x01
# Disable 0x00
NXP_LS_FORCE_UPDATE_REQUIRED=0x00
###############################################################################
# Option to perform JCOP update every boot
# Enable 0x01
# Disable 0x00
NXP_JCOP_FORCE_UPDATE_REQUIRED=0x00
###############################################################################
# Bail out mode
# If set to 1, NFCC is using bail out mode for either Type A or Type B poll.
# Set this parameter value to 1 if Android Beam is enabled, else set to 0.
NFA_POLL_BAIL_OUT_MODE=0x00
###############################################################################
# White list of Hosts
# This values will be the Hosts(NFCEEs) in the HCI Network.
DEVICE_HOST_WHITE_LIST={C0, 80}
###############################################################################
# Choose the presence-check algorithm for type-4 tag. If not defined, the default value is 1.
# 0 NFA_RW_PRES_CHK_DEFAULT; Let stack selects an algorithm
# 1 NFA_RW_PRES_CHK_I_BLOCK; ISO-DEP protocol's empty I-block
# 2 NFA_RW_PRES_CHK_ISO_DEP_NAK; Type - 4 tag protocol iso-dep nak presence check
# command is sent waiting for rsp and ntf.
PRESENCE_CHECK_ALGORITHM=2
###############################################################################
# Options to Fallback to alternative route
# DH 0x01
# ESE 0x02
NXP_CHECK_DEFAULT_PROTO_SE_ID=0x01
###############################################################################
# Vendor Specific Proprietary Protocol & Discovery Configuration
# Set to 0xFF if unsupported
# byte[0] NCI_PROTOCOL_18092_ACTIVE
# byte[1] NCI_PROTOCOL_B_PRIME
# byte[2] NCI_PROTOCOL_DUAL
# byte[3] NCI_PROTOCOL_15693
# byte[4] NCI_PROTOCOL_KOVIO
# byte[5] NCI_PROTOCOL_MIFARE
# byte[6] NCI_DISCOVERY_TYPE_POLL_KOVIO
# byte[7] NCI_DISCOVERY_TYPE_POLL_B_PRIME
# byte[8] NCI_DISCOVERY_TYPE_LISTEN_B_PRIME
NFA_PROPRIETARY_CFG={05, FF, FF, 06, 81, 80, FF, FF, FF}
###############################################################################
#NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE
#Enable/Disable block number checks for china transit use case
#Enable 0x01
#Disable 0x00
#NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE=0x01
################################################################################
#This flags will enable different modes of Lx Debug based on bits of the Byte0
#Byte 0:
# |_________Bit Mask_______| Debug Mode
# b7|b6|b5|b4|b3|b2|b1|b0|
# | |x | | | | | | Modulation Detected Notification
# | | |X | | | | | Enable L1 Events (ISO14443-4, ISO18092)
# | | | |X | | | | Enable L2 Reader Events(ROW specific)
# | | | | |X | | | Enable Felica SystemCode
# | | | | | |X | | Enable Felica RF (all Felica CM events)
# | | | | | | |X | Enable L2 Events CE (ISO14443-3, RF Field ON/OFF)
#Byte 1: RFU, shall always be 0x00
# Byte1 Byte0
# \__ __/
# e.g. NXP_CORE_PROP_SYSTEM_DEBUG=0x0031 ==> Modulation detected, L1, L2 CE
NXP_CORE_PROP_SYSTEM_DEBUG=0x0000
###############################################################################
#Enable NXP NCI runtime parser library
#Enable 0x01
#Disable 0x00
NXP_NCI_PARSER_LIBRARY=0x00
###############################################################################
# Timeout value in milliseconds for JCOP OS download to complete
OS_DOWNLOAD_TIMEOUT_VALUE=60000
###############################################################################
# Forcing HOST to listen for a selected protocol
# 0x00 : Disable Host Listen
# 0x01 : Enable Host to Listen (A) for ISO-DEP tech A
# 0x02 : Enable Host to Listen (B) for ISO-DEP tech B
# 0x04 : Enable Host to Listen (F) for T3T Tag Type Protocol tech F
# 0x07 : Enable Host to Listen (ABF)for ISO-DEP tech AB & T3T Tag Type Protocol tech F
HOST_LISTEN_TECH_MASK=0x07
###############################################################################
# Enable forward functionality
# Disable 0x00
# Enable 0x01 //Any positive value as per below bit configuration
# HOST power states when type A/B only UICC present
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
FORWARD_FUNCTIONALITY_ENABLE=0x01
###############################################################################
# Configure the NFC Extras to open and use a static pipe. If the value is
# not set or set to 0, then the default is use a dynamic pipe based on a
# destination gate (see NFA_HCI_DEFAULT_DEST_GATE). Note there is a value
# for each EE (ESE/SIM1/SIM2)
OFF_HOST_ESE_PIPE_ID=0x16
OFF_HOST_SIM_PIPE_ID=0x0A
OFF_HOST_SIM2_PIPE_ID=0x23
###############################################################################
#Set the Felica T3T System Code Power state :
#This settings will be used when application does not set this parameter
#Update Power state as per NCI2.0
DEFAULT_SYS_CODE_PWR_STATE=0x00
###############################################################################
#Default Secure Element route id
DEFAULT_OFFHOST_ROUTE=0x01
###############################################################################
#Maximum SMB transceive wait for response
NXP_SMB_TRANSCEIVE_TIMEOUT=2000
###############################################################################
# Firmware file type
#.so file 0x01
#.bin file 0x02
NXP_FW_TYPE=0x01
############################################################################
# Extended APDU length for ISO_DEP
ISO_DEP_MAX_TRANSCEIVE=0xFEFF
#########################################################################
# Support for Amendment I SEMS specification
# Support SEMS Amendment I 0x01
# Support NXP LS client 0x00
NXP_GP_AMD_I_SEMS_SUPPORTED=0x01
###############################################################################
#All eSE terminals shall be match with the /vendor/etc/vintf/manifest.xml file
#under android.hardware.secure_element
# The terminal name shall start from 1
# Assign terminal number to each interface based on system config
NXP_SPI_SE_TERMINAL_NUM="eSE1"
###############################################################################
# Assign terminal number to each interface based on system config
#NXP_VISO_SE_TERMINAL_NUM="eSE3"
###############################################################################
# Assign terminal number to each interface based on system config
NXP_NFC_SE_TERMINAL_NUM="eSE2"
###############################################################################
#For static or dynamic dual UICC feature support
#Enable static dual uicc feature by setting value 0x00
#Enable dynamic dual uicc feature by setting value 0x01
NXP_DUAL_UICC_ENABLE=0x01
###############################################################################
# Time to wait by DH when NFCC will report eSE Cold Temp Error.
# The value is as per the UM and in seconds
NXP_SE_COLD_TEMP_ERROR_DELAY=0x05
###############################################################################
#OffHost ESE route location for MultiSE
#ESE = 01
OFFHOST_ROUTE_ESE={01}
###############################################################################
#OffHost UICC route location for MultiSE
#UICC1 = 02
#UICC2 = 03
OFFHOST_ROUTE_UICC={02:03}
###############################################################################
#T4T NFCEE ENABLE
#bit pos 0 = T4T NFCEE Enable
#bit pos 6 = T4T NFCEE Contactless write enable
NXP_T4T_NFCEE_ENABLE=0x01
###############################################################################
#CORE_SET_CONF_CMD to reset Prop Emvco Flag
NXP_PROP_RESET_EMVCO_CMD={20, 02, 05, 01, A0, 44, 01, 00}
###############################################################################
#Guard time in ms for the mPOS/SCR module to process the reader start/stop req
NXP_RDR_REQ_GUARD_TIME=0
###############################################################################
#MW workaround to enable LPCD when EMVCO polling mode starts and disable
#while switching back to NFC Forum mode
# 0 --> Disable MW workaround
# 1 --> Enable MW workaround
# 2 --> Use this option only for FW versions below 1.10.52
NXP_RDR_DISABLE_ENABLE_LPCD=0
###############################################################################
# Firmware patch format, Only 1 and 5 should be set
# 0 -> NFC Default
# 1 -> EMVCO Default
# 3 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = Removal process
# 5 -> EMVCO Cert Polling, DISC_IDLE = Removal process , DISC DEACTIVATE = POWER_OFF
# 7 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = POWER_OFF
NFA_CONFIG_FORMAT=1
#################################################################################
# Enable disconnect tag in screen off
# Disable 0x00
# Enable 0x01
NXP_DISCONNECT_TAG_IN_SCRN_OFF=0x01
#################################################################################
###############################################################################
# Enable(0x01) or disable(0x00) non-standard tag reading
# Disable Non-standard card read 0x00
# Enable Non-standard card read 0x01
NXP_SUPPORT_NON_STD_CARD=0x00
#################################################################################
# Enable(0x01) or disable(0x00 ) for getting HW Info log over SMB wired
# Disable getting HW info log 0x00
# Enable getting HW info log 0x01
NXP_GET_HW_INFO_LOG=0x00
#################################################################################
# Enable(0x01) or disable(0x00) iso dep sak merge
# Disable SAK merging 0x00
# Enable SAK merging 0x01
NXP_ISO_DEP_MERGE_SAK=0x01
#################################################################################
# Valid time difference range within for non-standard tag detection from first
# Activation fail to next discovery
# Note :- 1. This will take effect only when NXP_SUPPORT_NON_STD_CARD is enabled
# 2. The number will be multiplied by 100ms by MW.
# Default:
# Set to 00 if not supported
# byte[0] MIFARE_CLASSIC 100ms
# byte[1] ISO_DEP 300ms
NXP_NON_STD_CARD_TIMEDIFF={01, 03}
#################################################################################
# Enable or Disable UICC ETSI support
# Disable UICC ETSI support 0
# Enable UICC ETSI support 1
NXP_UICC_ETSI_SUPPORT=0
#################################################################################
# Minimal FW Version used for recovery
NXP_MINIMAL_FW_VERSION=0x110DE
#################################################################################
# Enable Stop/Start of RF discovery for NFCEE recovery
# Disable RF Restart for NFCEE recovery 0
# Enable RF Restart for NFCEE recovery 1
NXP_RESTART_RF_FOR_NFCEE_RECOVERY=0
#################################################################################
# Enable or Disable the minimal FW recovery support.
# This logic will get enabled on early NFC hal boot.
# Disable NFCC RECOVERY support 0x00
# Enable NFCC RECOVERY support 0x01
NXP_NFCC_RECOVERY_SUPPORT=0x01
#################################################################################

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@@ -1,62 +0,0 @@
reset 1
interval 50
#flushing i2c buffer
send 20000100
send 2001020000
send 20000100
send 2001020000
send 2F0200
send 20020501A08E0101
send 2F2100
send 20000100
send 2001020000
send 21000A03040302030201800180
# DISC
send 220000
interval 500
send 2201021001
interval 50
send 010003810201
interval 50
send 010007810103028081C0
interval 50
send 0100058101060100
interval 50
send 2201028001
interval 50
send 010003810204
interval 50
send 220102C001
interval 50
send 010003810204
interval 50
send 220302C001
interval 50
send 20020401850101
send 2F2100
send 20090100
send 20020401020101
send 20021005300104310100320120380101500100
send 200205010002F401
send 21030F070001010102018001810182010601
send 21060100
send 21013600074209103BD2760000850101420F0011A000000809434343444B4676315202C03B4103C03B040003C03B000003C03B010003C03B02
send 21030F070001010102018001810182010601
interval 500
# use dwp
send 220302C003
# -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply and link always On
# 42030100
send 220102C001
# -=(NFCEE_MODE_SET_CMD)=- enabled C0
# 42010100
# 62010100<<NFCEE_MODE_SET_NTF>>
interval 100
send 01000799500070000001
# HCI SMX wired APDU: data exchange
# APDU: 0070000001
# MANAGE CHANNEL

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@@ -1,153 +0,0 @@
reset 1
interval 50
#flushing i2c buffer
send 20000100^M
send 20000100^M
send 20000100^M
send 20000100^M
# -=(CORE_RESET_CMD)=- Keep Configuration
# 40000100
# 60000A020020040500A4011007
# <<CORE_RESET_NTF>> CORE_RESET_CMD received
# NCI RF Configuration has been kept NCI 2.0 Model ID:00 HW ID:A4 FW:01.10.07
send 2001020000
# -=(CORE_INIT_CMD)=- NCI2.0
# 400120001A3E0600010604FFFF01FF0008000001010002000301018000820083008400
send 20000100^M
# -=(CORE_RESET_CMD)=- Keep Configuration
# 40000100^M
# 60000A020020040500A4011007^M<<CORE_RESET_NTF>> CORE_RESET_CMD received
# NCI RF Configuration has been kept^MNCI 2.0^MModel ID:00 HW ID:A4 FW:01.10.07
send 2001020000^M
# -=(CORE_INIT_CMD)=- NCI2.0
# 400120001A3E0600010604FFFF01FF0008000001010002000301018000820083008400^M
send 2F0200^M
# -=(NCI_PROPRIETARY_ACT_CMD)=-
# 4F02050000010AE3
send 2F000101^M
# -=(CORE_SET_POWER_MODE_CMD)=- Standby Mode enabled
# 4F000100
send 220000^M
# -=(NFCEE_DISCOVER_CMD)=-
# 4200020003^M3 NFCEE found
# 6200088001000103010200^M<<NFCEE_DISCOVER_NTF>> 80 disabled
# Host ID:02
# NFCC has no control of the NFCEE power supply
# 6200088101000103018100^M<<NFCEE_DISCOVER_NTF>> 81 disabled
# Host ID:81
# NFCC has no control of the NFCEE power supply
# 620008C00100010301C001^M<<NFCEE_DISCOVER_NTF>> C0 disabled
# Host ID:C0
# NFCC has control of the NFCEE power supply
send 010003810201[1;35m HCI admin: get session id
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 01000A818046F7656673F76566[1;35m HCI admin: any ok
# 010007810103028182C0[1;35m HCI admin: set whitelist
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 0100028180[1;35m HCI admin: any ok
send 2201028001^M
# -=(NFCEE_MODE_SET_CMD)=- enabled 80
# 42010100
# 62010103^MOUPS! status failed
send 010003810204
# HCI admin: get host list
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 010003818000 HCI admin: any ok
send 2201028101^M
# -=(NFCEE_MODE_SET_CMD)=- enabled 81
# 42010100
# 62010103^MOUPS! status failed
send 010003810204
# HCI admin: get host list
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 010003818000 HCI admin: any ok
send 220102C001^M
# -=(NFCEE_MODE_SET_CMD)=- enabled C0
# 42010100
# 610A06010003C08004^M<<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Apl-IsoDep
# 62010100^M<<NFCEE_MODE_SET_NTF>>
send 010003810204
# HCI admin: get host list
# 610A06010003C08104^M<<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Bpl-IsoDep
# 010004818000C0 HCI admin: any ok
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 610A06010003C08203^M<<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Fpl-T3T
send 21012400075202C0394103C03B04010300010301030001050003C03B000003C03B010003C03B02^M
# -=(RF_SET_LISTEN_MODE_ROUTING_CMD)=-
# Power state: RFU | RFU | Sub3 | Sub2 | Sub1 | BatOff | SwOff | SwOn
# Sub1: No Screen Unlocked, Sub2: Screen Locked, Sub3: No Screen Locked
# AID {Blocked, Prefix} [Route:C0, Power:39, AID:*]
# Proto {Blocked} [Route:C0, Power:3B, Proto:IsoDep]
# Proto [Route:00, Power:01, Proto:T3T]
# Proto [Route:00, Power:01, Proto:NfcDep]
# Techo [Route:C0, Power:3B, Techno:A]
# Techo [Route:C0, Power:3B, Techno:B]
# Techo [Route:C0, Power:3B, Techno:F]
# 41010100
send 21030703800181018201^M
# -=([1;32mRF_DISCOVER_CMD)=-
# Apl Bpl Fpl
# 41030100
send 20090100^M
# -=(CORE_SET_POWER_SUB_STATE_CMD)=- Screen On Unlocked
# 40090100
send 2103150A0001010102010301800181018201830106017001^M
# -=([1;32mRF_DISCOVER_CMD)=-
# App Bpp Fpp Aap Apl Bpl Fpl Aal 15693pp Koviopp
# 41030100
# use dwp
send 220302C003^M
# -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply and link always On
# 42030100
send 220102C001^M
# -=(NFCEE_MODE_SET_CMD)=- enabled C0
# 42010100
# 62010100^M<<NFCEE_MODE_SET_NTF>>
interval 100
send 01000799500070000001
# HCI SMX wired APDU: data exchange
# APDU: 0070000001
# MANAGE CHANNEL
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 0100059950019000 HCI SMX wired APDU: data exchange
# send 010010995001A4040009A00000015141434C00^M
# HCI SMX wired APDU: data exchange
# APDU: 01A4040009A00000015141434C00
# SELECT ARA-M
# select ISD
send 01000F995000A4040008A000000151000000
# get CPLC
send 010007995080CA9F7F00
interval 50
send 01000799500170800100^M
# HCI SMX wired APDU: data exchange
# APDU: 0170800100
# MANAGE CHANNEL
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 01000499509000 HCI SMX wired APDU: data exchange
# APDU: 9000
# I - Command successfully executed (OK).
send 220302C001^M
# -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply always On
# 42030100
# 0100029961 HCI SMX wired APDU: end of APDU transfer
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
sleep 100000

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@@ -1,155 +0,0 @@
reset 1
interval 50
#flushing i2c buffer
send 20000100^M
send 20000100^M
send 20000100^M
send 20000100^M
# -=(CORE_RESET_CMD)=- Keep Configuration
# 40000100
# 60000A020020040500A4011007
# <<CORE_RESET_NTF>> CORE_RESET_CMD received
# NCI RF Configuration has been kept NCI 2.0 Model ID:00 HW ID:A4 FW:01.10.07
send 2001020000
# -=(CORE_INIT_CMD)=- NCI2.0
# 400120001A3E0600010604FFFF01FF0008000001010002000301018000820083008400
send 20000100^M
# -=(CORE_RESET_CMD)=- Keep Configuration
# 40000100^M
# 60000A020020040500A4011007^M<<CORE_RESET_NTF>> CORE_RESET_CMD received
# NCI RF Configuration has been kept^MNCI 2.0^MModel ID:00 HW ID:A4 FW:01.10.07
send 2001020000^M
# -=(CORE_INIT_CMD)=- NCI2.0
# 400120001A3E0600010604FFFF01FF0008000001010002000301018000820083008400^M
send 2F0200^M
# -=(NCI_PROPRIETARY_ACT_CMD)=-
# 4F02050000010AE3
send 2F000101^M
# -=(CORE_SET_POWER_MODE_CMD)=- Standby Mode enabled
# 4F000100
send 220000^M
# -=(NFCEE_DISCOVER_CMD)=-
# 4200020003^M3 NFCEE found
# 6200088001000103010200^M<<NFCEE_DISCOVER_NTF>> 80 disabled
# Host ID:02
# NFCC has no control of the NFCEE power supply
# 6200088101000103018100^M<<NFCEE_DISCOVER_NTF>> 81 disabled
# Host ID:81
# NFCC has no control of the NFCEE power supply
# 620008C00100010301C001^M<<NFCEE_DISCOVER_NTF>> C0 disabled
# Host ID:C0
# NFCC has control of the NFCEE power supply
send 010003810201[1;35m HCI admin: get session id
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 01000A818046F7656673F76566[1;35m HCI admin: any ok
# 010007810103028182C0[1;35m HCI admin: set whitelist
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 0100028180[1;35m HCI admin: any ok
send 2201028001^M
# -=(NFCEE_MODE_SET_CMD)=- enabled 80
# 42010100
# 62010103^MOUPS! status failed
send 010003810204
# HCI admin: get host list
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 010003818000 HCI admin: any ok
send 2201028101^M
# -=(NFCEE_MODE_SET_CMD)=- enabled 81
# 42010100
# 62010103^MOUPS! status failed
send 010003810204
# HCI admin: get host list
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 010003818000 HCI admin: any ok
send 220102C001^M
# -=(NFCEE_MODE_SET_CMD)=- enabled C0
# 42010100
# 610A06010003C08004^M<<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Apl-IsoDep
# 62010100^M<<NFCEE_MODE_SET_NTF>>
send 010003810204
# HCI admin: get host list
# 610A06010003C08104^M<<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Bpl-IsoDep
# 010004818000C0 HCI admin: any ok
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 610A06010003C08203^M<<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Fpl-T3T
send 21012400075202C0394103C03B04010300010301030001050003C03B000003C03B010003C03B02^M
# -=(RF_SET_LISTEN_MODE_ROUTING_CMD)=-
# Power state: RFU | RFU | Sub3 | Sub2 | Sub1 | BatOff | SwOff | SwOn
# Sub1: No Screen Unlocked, Sub2: Screen Locked, Sub3: No Screen Locked
# AID {Blocked, Prefix} [Route:C0, Power:39, AID:*]
# Proto {Blocked} [Route:C0, Power:3B, Proto:IsoDep]
# Proto [Route:00, Power:01, Proto:T3T]
# Proto [Route:00, Power:01, Proto:NfcDep]
# Techo [Route:C0, Power:3B, Techno:A]
# Techo [Route:C0, Power:3B, Techno:B]
# Techo [Route:C0, Power:3B, Techno:F]
# 41010100
send 21030703800181018201^M
# -=([1;32mRF_DISCOVER_CMD)=-
# Apl Bpl Fpl
# 41030100
send 20090100^M
# -=(CORE_SET_POWER_SUB_STATE_CMD)=- Screen On Unlocked
# 40090100
send 2103150A0001010102010301800181018201830106017001^M
# -=([1;32mRF_DISCOVER_CMD)=-
# App Bpp Fpp Aap Apl Bpl Fpl Aal 15693pp Koviopp
# 41030100
# use dwp
send 220302C003^M
# -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply and link always On
# 42030100
send 220102C001^M
# -=(NFCEE_MODE_SET_CMD)=- enabled C0
# 42010100
# 62010100^M<<NFCEE_MODE_SET_NTF>>
interval 100
send 01000799500070000001
# HCI SMX wired APDU: data exchange
# APDU: 0070000001
# MANAGE CHANNEL
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 0100059950019000 HCI SMX wired APDU: data exchange
# send 010010995001A4040009A00000015141434C00^M
# HCI SMX wired APDU: data exchange
# APDU: 01A4040009A00000015141434C00
# SELECT ARA-M
# disable ISO
send 010015995000A404000EA000000396545400000001400101
send 010090995000D6000089408704FFFFFFFF81806B96AA7A3A5AA33B83C38E0150FFB8A296B1D359FD900D78A7C071CA9A53A045F9C85E0354293B383AEEBDD0EE1E9E13600459579A367079FB82E8FD3DA2847905ACB71CCEFD1804EB87FCBA60926A2B8C1CF3064AF36EE9F78CD592F627BFFCED6CAF74A35AE17535D78B9609960C42E5B853B209A47DA05634AA3D07FF998D
send 010090995000D6000089408A04FFFFFFFF818008B6931CDF8AC56A9E6F4C46522A1B93913465AA1C933D41F11BBF98A2DCE6091DD0262C8D94FC2CD7497690F3C7ADA1A2E5CFA25760A1F0A7489366C4D9AC79BABC11D4F8BE05B3AD3AB90AC5199EEE43B03C09549A3B6BC6AFC907DAE9D8946600EEF7414219A42DD9224EC3BD353F3F407182987F3F180993CDA590F9219D
send 010090995000D6000089400B0400000FF881807FD6CC0072CBECA0E9460F1976C1FD6F77B099DF60195FC793D69D5AE7E59AFA7D27B214FB2DCF9F6E9F036D61B8FD82F13A2F673724BB11B09BFDE1B206BE1340E0F02024E2F28C92EA69B867570809B0520260E069B55A9D49981728E640B29772A7FBF615705055D547B3FC72DCFDC28A7078BD5FF403F24138BD019D08C0
send 010090995000D6000089400C04000000188180324FD7D93ADEC6C0661E10126A94627C868DB5F95B872FD3C0749F563CBEDA027F87164ADEC4EB4886E034FF5DBF49C35149C7DC8EA7A95CFBB18B67FE18287DDF96D7203DFD6097F93201790D014A83E2901D78F1DAFBFB6D782DF71FBF1A4E4048A68E2FB83DD14D22BE01E30019A074CC7D5C72502AB05FE260F2718A127F
send 01008E995000D6000087404A026020818041B6E3BB9D98B4F2081B90282F6FA3F75EABEEA2AEE49E834277811F5DF4ADE53DADC8963AA24811F695579D3658D4C8E42F15634A92A0D4B5751565CBDBF8E5A045E72BDC28312D46C71A98039C0C070D4923F7C1706E002918693B9C3F01478D921E3A602838EFB79D4D1E72697E27A5671A668C806A5EA24B501192A7C3E9
interval 50
send 01000799500170800100^M
# HCI SMX wired APDU: data exchange
# APDU: 0170800100
# MANAGE CHANNEL
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 01000499509000 HCI SMX wired APDU: data exchange
# APDU: 9000
# I - Command successfully executed (OK).
send 220302C001^M
# -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply always On
# 42030100
# 0100029961 HCI SMX wired APDU: end of APDU transfer
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>

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@@ -1,180 +0,0 @@
reset 1
interval 50
#flushing i2c buffer
send 20000100^M
send 20000100^M
send 20000100^M
send 20000100^M
# -=(CORE_RESET_CMD)=- Keep Configuration
# 40000100
# 60000A020020040500A4011007
# <<CORE_RESET_NTF>> CORE_RESET_CMD received
# NCI RF Configuration has been kept NCI 2.0 Model ID:00 HW ID:A4 FW:01.10.07
send 2001020000
# -=(CORE_INIT_CMD)=- NCI2.0
# 400120001A3E0600010604FFFF01FF0008000001010002000301018000820083008400
send 20000100^M
# -=(CORE_RESET_CMD)=- Keep Configuration
# 40000100^M
# 60000A020020040500A4011007^M<<CORE_RESET_NTF>> CORE_RESET_CMD received
# NCI RF Configuration has been kept^MNCI 2.0^MModel ID:00 HW ID:A4 FW:01.10.07
send 2001020000^M
# -=(CORE_INIT_CMD)=- NCI2.0
# 400120001A3E0600010604FFFF01FF0008000001010002000301018000820083008400^M
send 2F0200^M
# -=(NCI_PROPRIETARY_ACT_CMD)=-
# 4F02050000010AE3
send 2F000101^M
# -=(CORE_SET_POWER_MODE_CMD)=- Standby Mode enabled
# 4F000100
send 220000^M
# -=(NFCEE_DISCOVER_CMD)=-
# 4200020003^M3 NFCEE found
# 6200088001000103010200^M<<NFCEE_DISCOVER_NTF>> 80 disabled
# Host ID:02
# NFCC has no control of the NFCEE power supply
# 6200088101000103018100^M<<NFCEE_DISCOVER_NTF>> 81 disabled
# Host ID:81
# NFCC has no control of the NFCEE power supply
# 620008C00100010301C001^M<<NFCEE_DISCOVER_NTF>> C0 disabled
# Host ID:C0
# NFCC has control of the NFCEE power supply
send 010003810201[1;35m HCI admin: get session id
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 01000A818046F7656673F76566[1;35m HCI admin: any ok
# 010007810103028182C0[1;35m HCI admin: set whitelist
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 0100028180[1;35m HCI admin: any ok
send 2201028001^M
# -=(NFCEE_MODE_SET_CMD)=- enabled 80
# 42010100
# 62010103^MOUPS! status failed
send 010003810204
# HCI admin: get host list
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 010003818000 HCI admin: any ok
send 2201028101^M
# -=(NFCEE_MODE_SET_CMD)=- enabled 81
# 42010100
# 62010103^MOUPS! status failed
send 010003810204
# HCI admin: get host list
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 010003818000 HCI admin: any ok
send 220102C001^M
# -=(NFCEE_MODE_SET_CMD)=- enabled C0
# 42010100
# 610A06010003C08004^M<<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Apl-IsoDep
# 62010100^M<<NFCEE_MODE_SET_NTF>>
send 010003810204
# HCI admin: get host list
# 610A06010003C08104^M<<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Bpl-IsoDep
# 010004818000C0 HCI admin: any ok
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 610A06010003C08203^M<<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Fpl-T3T
send 21012400075202C0394103C03B04010300010301030001050003C03B000003C03B010003C03B02^M
# -=(RF_SET_LISTEN_MODE_ROUTING_CMD)=-
# Power state: RFU | RFU | Sub3 | Sub2 | Sub1 | BatOff | SwOff | SwOn
# Sub1: No Screen Unlocked, Sub2: Screen Locked, Sub3: No Screen Locked
# AID {Blocked, Prefix} [Route:C0, Power:39, AID:*]
# Proto {Blocked} [Route:C0, Power:3B, Proto:IsoDep]
# Proto [Route:00, Power:01, Proto:T3T]
# Proto [Route:00, Power:01, Proto:NfcDep]
# Techo [Route:C0, Power:3B, Techno:A]
# Techo [Route:C0, Power:3B, Techno:B]
# Techo [Route:C0, Power:3B, Techno:F]
# 41010100
send 21030703800181018201^M
# -=([1;32mRF_DISCOVER_CMD)=-
# Apl Bpl Fpl
# 41030100
send 20090100^M
# -=(CORE_SET_POWER_SUB_STATE_CMD)=- Screen On Unlocked
# 40090100
send 2103150A0001010102010301800181018201830106017001^M
# -=([1;32mRF_DISCOVER_CMD)=-
# App Bpp Fpp Aap Apl Bpl Fpl Aal 15693pp Koviopp
# 41030100
# use dwp
send 220302C003^M
# -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply and link always On
# 42030100
send 220102C001^M
# -=(NFCEE_MODE_SET_CMD)=- enabled C0
# 42010100
# 62010100^M<<NFCEE_MODE_SET_NTF>>
interval 100
send 01000799500070000001
# HCI SMX wired APDU: data exchange
# APDU: 0070000001
# MANAGE CHANNEL
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 0100059950019000 HCI SMX wired APDU: data exchange
# send 010010995001A4040009A00000015141434C00^M
# HCI SMX wired APDU: data exchange
# APDU: 01A4040009A00000015141434C00
# SELECT ARA-M
# disable ISO
#send 010015995000A404000EA000000396545400000001400101
#send 010090995000D6000089408704FFFFFFFF81806B96AA7A3A5AA33B83C38E0150FFB8A296B1D359FD900D78A7C071CA9A53A045F9C85E0354293B383AEEBDD0EE1E9E13600459579A367079FB82E8FD3DA2847905ACB71CCEFD1804EB87FCBA60926A2B8C1CF3064AF36EE9F78CD592F627BFFCED6CAF74A35AE17535D78B9609960C42E5B853B209A47DA05634AA3D07FF998D
#send 010090995000D6000089408A04FFFFFFFF818008B6931CDF8AC56A9E6F4C46522A1B93913465AA1C933D41F11BBF98A2DCE6091DD0262C8D94FC2CD7497690F3C7ADA1A2E5CFA25760A1F0A7489366C4D9AC79BABC11D4F8BE05B3AD3AB90AC5199EEE43B03C09549A3B6BC6AFC907DAE9D8946600EEF7414219A42DD9224EC3BD353F3F407182987F3F180993CDA590F9219D
#send 010090995000D6000089400B0400000FF881807FD6CC0072CBECA0E9460F1976C1FD6F77B099DF60195FC793D69D5AE7E59AFA7D27B214FB2DCF9F6E9F036D61B8FD82F13A2F673724BB11B09BFDE1B206BE1340E0F02024E2F28C92EA69B867570809B0520260E069B55A9D49981728E640B29772A7FBF615705055D547B3FC72DCFDC28A7078BD5FF403F24138BD019D08C0
#send 010090995000D6000089400C04000000188180324FD7D93ADEC6C0661E10126A94627C868DB5F95B872FD3C0749F563CBEDA027F87164ADEC4EB4886E034FF5DBF49C35149C7DC8EA7A95CFBB18B67FE18287DDF96D7203DFD6097F93201790D014A83E2901D78F1DAFBFB6D782DF71FBF1A4E4048A68E2FB83DD14D22BE01E30019A074CC7D5C72502AB05FE260F2718A127F
#send 01008E995000D6000087404A026020818041B6E3BB9D98B4F2081B90282F6FA3F75EABEEA2AEE49E834277811F5DF4ADE53DADC8963AA24811F695579D3658D4C8E42F15634A92A0D4B5751565CBDBF8E5A045E72BDC28312D46C71A98039C0C070D4923F7C1706E002918693B9C3F01478D921E3A602838EFB79D4D1E72697E27A5671A668C806A5EA24B501192A7C3E9
#Read disabled ISO
send 010015995000A404000EA000000396545400000001400101
#######expected value:
#4087 - FFFFFFFF
#408A - FFFFFFFF
#400B - 0FF8
#400C - 0018
#404A - 6020
trigger 0100169950408704FFFFFFFF
trigger 600603010101
send 01008B995000B00000844087818002C4CDC258612EF4C92823A424179F9412ACBF6B58DD18FD7610B61895EDCFD1343A92472D78572F2B3145EB7CFC6612A0136C8663E80B0D891F903ACBCE5E682692A3EF7CCE5E80076569B7B87C132EFB30171FF1871FD53DCF9FF9BE9282EB6DEFCE04FEC56C4D989164916B4CB73DB4148B00B78AEF6AF86DC34082C18021
trigger 0100169950408A04FFFFFFFF
trigger 600603010101
send 01008B995000B0000084408A818015D8FC35ACA5B64572AA34CBCD08470FDB36FFC34BE84647D56655BC8406FAA981B132A5380A371EC0B3DA4E843A3390C9B051F8EC80D211A8DE29C069FB54C8DEEB17A6FE503B1011B99A65BE0D42819AD204A0E216171DA5737BF30C9D4B6881BC7515507F1942A8E6EC4278368B5CDF30E6E44B577367CAB821A14527DEFC
trigger 0100169950400B0400000FF8
trigger 600603010101
send 01008B995000B0000084400B81801D5343205BCAD78B0BB7437F513670DC16A36E194DD249123B14106D97B9E1E4D1FFA86FB8F9EDA919BA0BE5266E34C866B38CE75D9FB6178A52B164928A678AF686EC296B258B757303BB9E46ACA49770649B054F4F05D77C325F1168F41792570E9D6FAEE2DB5F889D8DE3CC7BFC496C6BE5E5D950C6AEBD3B3F4A427AF1FA
trigger 0100169950400C0400000018
trigger 600603010101
send 01008B995000B0000084400C81807027A9702C0EB040E872180290AA2797AD6076B2D884ED92C8D0C82F339EFC3A39AA0680EAFCEE0DF155AC7070E44DEF605818C40636038E3F14D8B2E45503447C5781A9F0E2C70E8D4E1E163959721D3800A0F71CC2D87FCB2D33EFABCE28AFF1BA9914DCA02551407499C464807620A08B1CEBB678675955054F918AB03DE5
trigger 0100149950404A026020
trigger 600603010101
send 01008B995000B0000084404A81804569D04AADD34CC5675FDBCF0E16A32FDA496384C80F8FD1BDEEE759C96086BBE65214B1C78CE6ED418C8A76031EDD7EC5ADE9A8EB9E7BB341E06CE9BF513C500E77497B813464883B193536B87EEDE5675548323B3DC0AB829CB5C7C420B1A2F5574B0500ADD05A9B3EB8DB2333A7154A57BE81E3247E5F032A5A0514A63DCC
interval 50
send 01000799500170800100^M
# HCI SMX wired APDU: data exchange
# APDU: 0170800100
# MANAGE CHANNEL
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 01000499509000 HCI SMX wired APDU: data exchange
# APDU: 9000
# I - Command successfully executed (OK).
send 220302C001^M
# -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply always On
# 42030100
# 0100029961 HCI SMX wired APDU: end of APDU transfer
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>

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@@ -1,124 +0,0 @@
reset 1
interval 50
#flushing i2c buffer
send 20000100^M
send 20000100^M
send 20000100^M
send 20000100^M
# -=(CORE_RESET_CMD)=- Keep Configuration
# 40000100
# 60000A020020040500A4011007
# <<CORE_RESET_NTF>> CORE_RESET_CMD received
# NCI RF Configuration has been kept NCI 2.0 Model ID:00 HW ID:A4 FW:01.10.07
send 2001020000
# -=(CORE_INIT_CMD)=- NCI2.0
# 400120001A3E0600010604FFFF01FF0008000001010002000301018000820083008400
send 20000100^M
# -=(CORE_RESET_CMD)=- Keep Configuration
# 40000100^M
# 60000A020020040500A4011007^M<<CORE_RESET_NTF>> CORE_RESET_CMD received
# NCI RF Configuration has been kept^MNCI 2.0^MModel ID:00 HW ID:A4 FW:01.10.07
send 2001020000^M
# -=(CORE_INIT_CMD)=- NCI2.0
# 400120001A3E0600010604FFFF01FF0008000001010002000301018000820083008400^M
send 2F0200^M
# -=(NCI_PROPRIETARY_ACT_CMD)=-
# 4F02050000010AE3
send 2F000101^M
# -=(CORE_SET_POWER_MODE_CMD)=- Standby Mode enabled
# 4F000100
send 220000^M
# -=(NFCEE_DISCOVER_CMD)=-
# 4200020003^M3 NFCEE found
# 6200088001000103010200^M<<NFCEE_DISCOVER_NTF>> 80 disabled
# Host ID:02
# NFCC has no control of the NFCEE power supply
# 6200088101000103018100^M<<NFCEE_DISCOVER_NTF>> 81 disabled
# Host ID:81
# NFCC has no control of the NFCEE power supply
# 620008C00100010301C001^M<<NFCEE_DISCOVER_NTF>> C0 disabled
# Host ID:C0
# NFCC has control of the NFCEE power supply
send 010003810201[1;35m HCI admin: get session id
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 01000A818046F7656673F76566[1;35m HCI admin: any ok
# 010007810103028182C0[1;35m HCI admin: set whitelist
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 0100028180[1;35m HCI admin: any ok
send 2201028001^M
# -=(NFCEE_MODE_SET_CMD)=- enabled 80
# 42010100
# 62010103^MOUPS! status failed
send 010003810204
# HCI admin: get host list
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 010003818000 HCI admin: any ok
send 2201028101^M
# -=(NFCEE_MODE_SET_CMD)=- enabled 81
# 42010100
# 62010103^MOUPS! status failed
send 010003810204
# HCI admin: get host list
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 010003818000 HCI admin: any ok
send 220102C001^M
# -=(NFCEE_MODE_SET_CMD)=- enabled C0
# 42010100
# 610A06010003C08004^M<<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Apl-IsoDep
# 62010100^M<<NFCEE_MODE_SET_NTF>>
send 010003810204
# HCI admin: get host list
# 610A06010003C08104^M<<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Bpl-IsoDep
# 010004818000C0 HCI admin: any ok
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 610A06010003C08203^M<<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Fpl-T3T
send 21012400075202C0394103C03B04010300010301030001050003C03B000003C03B010003C03B02^M
# -=(RF_SET_LISTEN_MODE_ROUTING_CMD)=-
# Power state: RFU | RFU | Sub3 | Sub2 | Sub1 | BatOff | SwOff | SwOn
# Sub1: No Screen Unlocked, Sub2: Screen Locked, Sub3: No Screen Locked
# AID {Blocked, Prefix} [Route:C0, Power:39, AID:*]
# Proto {Blocked} [Route:C0, Power:3B, Proto:IsoDep]
# Proto [Route:00, Power:01, Proto:T3T]
# Proto [Route:00, Power:01, Proto:NfcDep]
# Techo [Route:C0, Power:3B, Techno:A]
# Techo [Route:C0, Power:3B, Techno:B]
# Techo [Route:C0, Power:3B, Techno:F]
# 41010100
send 21030703800181018201^M
# -=([1;32mRF_DISCOVER_CMD)=-
# Apl Bpl Fpl
# 41030100
send 20090100^M
# -=(CORE_SET_POWER_SUB_STATE_CMD)=- Screen On Unlocked
# 40090100
send 2103150A0001010102010301800181018201830106017001^M
# -=([1;32mRF_DISCOVER_CMD)=-
# App Bpp Fpp Aap Apl Bpl Fpl Aal 15693pp Koviopp
# 41030100
# use dwp
send 220302C003^M
# -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply and link always On
# 42030100
send 220102C001^M
# -=(NFCEE_MODE_SET_CMD)=- enabled C0
# 42010100
# 62010100^M<<NFCEE_MODE_SET_NTF>>
interval 100
#send 220302C000^M
# -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply always On
# 42030100
# 0100029961 HCI SMX wired APDU: end of APDU transfer
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>

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@@ -1,10 +0,0 @@
reset 0
reset 1
interval 50
# core_reset_ntf
trigger 60000A0201200405
# core_reset_rsp
trigger 40000100
# core reset
send 20000101

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@@ -1,29 +0,0 @@
reset 0
reset 1
interval 50
# core reset
send 20000101
# core_init
send 2001020000
send 2F0200
# RF_DISCOVER_MAP_CMD
send 21000D04040302050303030201800180
# start polling
trigger 6105
trigger 41030100
# App Bpp
send 2103050200010101
# App Bpp Fpp ap Apl Bpl Fpl al Vpp
# send 21031309000101010201030180018101820183010601
# sleep 10 seconds
sleep 10000
# deactivate_cmd(idle)
send 21060100

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@@ -1,104 +0,0 @@
reset 1
interval 50
#flushing i2c buffer
send 20000100
send 20000100
send 20000100
send 20000100
# -=(CORE_RESET_CMD)=- Keep Configuration
# 40000100
# 60000A020020040500A4011007
# <<CORE_RESET_NTF>> CORE_RESET_CMD received
# NCI RF Configuration has been kept NCI 2.0 Model ID:00 HW ID:A4 FW:01.10.07
send 2001020000
# -=(CORE_INIT_CMD)=- NCI2.0
# 400120001A3E0600010604FFFF01FF0008000001010002000301018000820083008400
send 20000100
# -=(CORE_RESET_CMD)=- Keep Configuration
# 40000100
# 60000A020020040500A4011007<<CORE_RESET_NTF>> CORE_RESET_CMD received
# NCI RF Configuration has been keptNCI 2.0Model ID:00 HW ID:A4 FW:01.10.07
send 2001020000
# -=(CORE_INIT_CMD)=- NCI2.0
# 400120001A3E0600010604FFFF01FF0008000001010002000301018000820083008400
send 2F0200
# -=(NCI_PROPRIETARY_ACT_CMD)=-
# 4F02050000010AE3
send 2F000101
# -=(CORE_SET_POWER_MODE_CMD)=- Standby Mode enabled
# 4F000100
send 220000
# -=(NFCEE_DISCOVER_CMD)=-
# 42000200033 NFCEE found
# 6200088001000103010200<<NFCEE_DISCOVER_NTF>> 80 disabled
# Host ID:02
# NFCC has no control of the NFCEE power supply
# 6200088101000103018100<<NFCEE_DISCOVER_NTF>> 81 disabled
# Host ID:81
# NFCC has no control of the NFCEE power supply
# 620008C00100010301C001<<NFCEE_DISCOVER_NTF>> C0 disabled
# Host ID:C0
# NFCC has control of the NFCEE power supply
send 010003810201
# HCI admin: get session id
# 600603010101<<CORE_CONN_CREDITS_NTF>>
# 01000A818046F7656673F76566[1;35m HCI admin: any ok
# 010007810103028182C0[1;35m HCI admin: set whitelist
# 600603010101<<CORE_CONN_CREDITS_NTF>>
# 0100028180[1;35m HCI admin: any ok
#send 2201028001
# -=(NFCEE_MODE_SET_CMD)=- enabled 80
# 42010100
# 62010103OUPS! status failed
send 010003810204
# HCI admin: get host list
# 600603010101<<CORE_CONN_CREDITS_NTF>>
# 010003818000 HCI admin: any ok
#send 2201028101
# -=(NFCEE_MODE_SET_CMD)=- enabled 81
# 42010100
# 62010103OUPS! status failed
#send 010003810204
# HCI admin: get host list
# 600603010101<<CORE_CONN_CREDITS_NTF>>
# 010003818000 HCI admin: any ok
send 220102C001
interval 150
# -=(NFCEE_MODE_SET_CMD)=- enabled C0
# 42010100
# 610A06010003C08004<<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Apl-IsoDep
# 62010100<<NFCEE_MODE_SET_NTF>>
send 010003810204
# HCI admin: get host list
# 610A06010003C08104<<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Bpl-IsoDep
# 010004818000C0 HCI admin: any ok
# 600603010101<<CORE_CONN_CREDITS_NTF>>
# 610A06010003C08203<<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Fpl-T3T
send 21012400075202C0394103C03B04010300010301030001050003C03B000003C03B010003C03B02
# -=(RF_SET_LISTEN_MODE_ROUTING_CMD)=-
# Power state: RFU | RFU | Sub3 | Sub2 | Sub1 | BatOff | SwOff | SwOn
# Sub1: No Screen Unlocked, Sub2: Screen Locked, Sub3: No Screen Locked
# AID {Blocked, Prefix} [Route:C0, Power:39, AID:*]
# Proto {Blocked} [Route:C0, Power:3B, Proto:IsoDep]
# Proto [Route:00, Power:01, Proto:T3T]
# Proto [Route:00, Power:01, Proto:NfcDep]
# Techo [Route:C0, Power:3B, Techno:A]
# Techo [Route:C0, Power:3B, Techno:B]
# Techo [Route:C0, Power:3B, Techno:F]
# 41010100
trigger 6105
trigger 41030100
send 210303018001
# -=([1;32mRF_DISCOVER_CMD)=-
# Apl
# 41030100
# sleep 10 seconds
sleep 10000

View File

@@ -1,101 +0,0 @@
reset 1
interval 50
#flushing i2c buffer
send 20000100^M
send 20000100^M
send 20000100^M
send 20000100^M
# -=(CORE_RESET_CMD)=- Keep Configuration
# 40000100
# 60000A020020040500A4011007
# <<CORE_RESET_NTF>> CORE_RESET_CMD received
# NCI RF Configuration has been kept NCI 2.0 Model ID:00 HW ID:A4 FW:01.10.07
send 2001020000
# -=(CORE_INIT_CMD)=- NCI2.0
# 400120001A3E0600010604FFFF01FF0008000001010002000301018000820083008400
send 20000100^M
# -=(CORE_RESET_CMD)=- Keep Configuration
# 40000100^M
# 60000A020020040500A4011007^M<<CORE_RESET_NTF>> CORE_RESET_CMD received
# NCI RF Configuration has been kept^MNCI 2.0^MModel ID:00 HW ID:A4 FW:01.10.07
send 2001020000^M
# -=(CORE_INIT_CMD)=- NCI2.0
# 400120001A3E0600010604FFFF01FF0008000001010002000301018000820083008400^M
send 2F0200^M
# -=(NCI_PROPRIETARY_ACT_CMD)=-
# 4F02050000010AE3
send 2F000101^M
# -=(CORE_SET_POWER_MODE_CMD)=- Standby Mode enabled
# 4F000100
send 220000^M
# -=(NFCEE_DISCOVER_CMD)=-
# 4200020003^M3 NFCEE found
# 6200088001000103010200^M<<NFCEE_DISCOVER_NTF>> 80 disabled
# Host ID:02
# NFCC has no control of the NFCEE power supply
# 6200088101000103018100^M<<NFCEE_DISCOVER_NTF>> 81 disabled
# Host ID:81
# NFCC has no control of the NFCEE power supply
# 620008C00100010301C001^M<<NFCEE_DISCOVER_NTF>> C0 disabled
# Host ID:C0
# NFCC has control of the NFCEE power supply
send 010003810201
# HCI admin: get session id
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 01000A818046F7656673F76566[1;35m HCI admin: any ok
# 010007810103028182C0[1;35m HCI admin: set whitelist
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 0100028180[1;35m HCI admin: any ok
#send 2201028001^M
# -=(NFCEE_MODE_SET_CMD)=- enabled 80
# 42010100
# 62010103^MOUPS! status failed
send 010003810204
# HCI admin: get host list
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 010003818000 HCI admin: any ok
#send 2201028101^M
# -=(NFCEE_MODE_SET_CMD)=- enabled 81
# 42010100
# 62010103^MOUPS! status failed
#send 010003810204
# HCI admin: get host list
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 010003818000 HCI admin: any ok
send 220102C001^M
sleep 500
# -=(NFCEE_MODE_SET_CMD)=- enabled C0
# 42010100
# 610A06010003C08004^M<<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Apl-IsoDep
# 62010100^M<<NFCEE_MODE_SET_NTF>>
send 010003810204
# HCI admin: get host list
# 610A06010003C08104^M<<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Bpl-IsoDep
# 010004818000C0 HCI admin: any ok
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 610A06010003C08203^M<<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Fpl-T3T
send 2101160004120200110304C039FEFF01030011040103000105^M
# -=(RF_SET_LISTEN_MODE_ROUTING_CMD)=-
# Power state: RFU | RFU | Sub3 | Sub2 | Sub1 | BatOff | SwOff | SwOn
# Sub1: No Screen Unlocked, Sub2: Screen Locked, Sub3: No Screen Locked
# AID {Prefix} [Route:00, Power:11, AID:*]
# SystemCode [Route:C0, Power:39, System Code:FEFF]
# Proto [Route:00, Power:11, Proto:IsoDep]
# Proto [Route:00, Power:01, Proto:NfcDep]
# 41010100
trigger 6105
trigger 41030100
#send 210303018001
send 210309048001810183018501
# -=([1;32mRF_DISCOVER_CMD)=-
# Apl
# 41030100
# sleep 10 seconds
sleep 10000

View File

@@ -1,215 +0,0 @@
reset 1
interval 50
#flushing i2c buffer
send 20000100
send 20000100
send 20000100
send 20000100
# -=(CORE_RESET_CMD)=- Keep Configuration
# 40000100
# 60000A020020040500A4011007
# <<CORE_RESET_NTF>> CORE_RESET_CMD received
# NCI RF Configuration has been kept NCI 2.0 Model ID:00 HW ID:A4 FW:01.10.07
send 2001020000
# -=(CORE_INIT_CMD)=- NCI2.0
# 400120001A3E0600010604FFFF01FF0008000001010002000301018000820083008400
send 20000100
# -=(CORE_RESET_CMD)=- Keep Configuration
# 40000100
# 60000A020020040500A4011007<<CORE_RESET_NTF>> CORE_RESET_CMD received
# NCI RF Configuration has been keptNCI 2.0Model ID:00 HW ID:A4 FW:01.10.07
send 2001020000
# -=(CORE_INIT_CMD)=- NCI2.0
# 400120001A3E0600010604FFFF01FF0008000001010002000301018000820083008400
send 2F0200
# -=(NCI_PROPRIETARY_ACT_CMD)=-
# 4F02050000010AE3
send 2F000101
# -=(CORE_SET_POWER_MODE_CMD)=- Standby Mode enabled
# 4F000100
send 20021204A0EC0101A0ED0101A0070101A047020027
# SWP_INT1_EN_CFG:01 SWP_INT2_EN_CFG:01 VEN_CFG:01 GT_NFC-AP_CFG:0027
send 220000
# -=(NFCEE_DISCOVER_CMD)=-
# 42000200033 NFCEE found
# 6200088001000103010200<<NFCEE_DISCOVER_NTF>> 80 disabled
# Host ID:02
# NFCC has no control of the NFCEE power supply
# 6200088101000103018100<<NFCEE_DISCOVER_NTF>> 81 disabled
# Host ID:81
# NFCC has no control of the NFCEE power supply
# 620008C00100010301C001<<NFCEE_DISCOVER_NTF>> C0 disabled
# Host ID:C0
# NFCC has control of the NFCEE power supply
send 0100028103 HCI admin: open
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 0100028180 HCI admin: any ok
send 01000B8101016E0A71666A0A7166 HCI admin: set session id
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 0100028180 HCI admin: any ok
send 010007810103028182C0 HCI admin: set whitelist
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 0100028180 HCI admin: any ok
send 010003810204 HCI admin: get host list
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 010003818000 HCI admin: any ok
send 220302C003 -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply and link always On
# 42030100
send 220102C001 -=(NFCEE_MODE_SET_CMD)=- enabled C0
# 42010100
# 620202C001 <<NFCEE_STATUS_NTF>> C0 Initialization sequence started
# 610A06010003C08004 <<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Apl-IsoDep
# 610A06010003C08104 <<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Bpl-IsoDep
# 0100078112C041014116 HCI admin: pipe created 16 (eSE connectivity) from C0 (41) to 01 (41)
send 0100028180 HCI admin: any ok
# 610A06010003C08203 <<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Fpl-T3T
# 0100029603 HCI eSE connectivity: open
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
send 010003968000 HCI eSE connectivity: any ok
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 620202C002 <<NFCEE_STATUS_NTF>> C0 Initialization sequence completed
# 62010100 <<NFCEE_MODE_SET_NTF>>
send 010003810204 HCI admin: get host list
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 010004818000C0 HCI admin: any ok
send 20030502A023A022 -=(CORE_GET_CONFIG_CMD)=-
# 40030A0002A0230100A0220101
# ?A023?:00 ?A022?:01
send 010005811011C030 HCI admin: create pipe from (11) to C0 (30)
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 01000781800111C03019 HCI admin: any ok
send 0100029903 HCI eSE wired APDU: open
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 010003998000 HCI eSE wired APDU: any ok
send 010003990201 HCI eSE wired APDU: get param:01
# 01001699523B8F80014A434F50352E312052312E30302E3140 HCI eSE wired APDU: transaction
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 01000499808000 HCI eSE wired APDU: any ok
send 010003990202 HCI eSE wired APDU: get param:02
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 010004998003E8 HCI eSE wired APDU: any ok
send 220302C001
# NFCEE_POWER_AND_LINK_CNTRL_CMD C0 NFCEE Power supply always On
send 21030703800181018201
# -=([1;32mRF_DISCOVER_CMD)=-
# Apl Bpl Fpl
# 41030100
# use dwp
send 220302C003
# -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply and link always On
# 42030100
send 220102C001
# -=(NFCEE_MODE_SET_CMD)=- enabled C0
# 42010100
# 62010100<<NFCEE_MODE_SET_NTF>>
interval 100
send 01000799500070000001
# HCI SMX wired APDU: data exchange
# APDU: 0070000001
# MANAGE CHANNEL
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 0100059950019000 HCI SMX wired APDU: data exchange
# send 010010995001A4040009A00000015141434C00^M
# HCI SMX wired APDU: data exchange
# APDU: 01A4040009A00000015141434C00
# SELECT ARA-M
# ESE Attributes
# select ISD
send 01000F995000A4040008A000000151000000
# get CPLC
# send 010007995080CA9F7F00
# get Free
# send 01000A995080CA00FE02DF2500
# get Keyset
# send 010007995080CA00E000
# get Fabkey
# send 01000A995080CA00FE02DF2300
# get SN
# send 01000A995080CA00FE02DF2100
# get AC counter
trigger 01000A9950FE04DF3C01
trigger 600603010101
send 01000A995080CA00FE02DF3C00
interval 100
# get AC log
trigger 0100
trigger 600603010101
send 01000A995080CA00FE02DF2600
interval 100
trigger 0100
trigger 0100
trigger 600603010101
send 01000A995080CA00FE02DF2600
interval 100
trigger 0100
trigger 0100
trigger 600603010101
send 01000A995080CA00FE02DF2600
interval 100
trigger 0100
trigger 0100
trigger 600603010101
send 01000A995080CA00FE02DF2600
interval 100
trigger 0100
trigger 0100
trigger 600603010101
send 01000A995080CA00FE02DF2600
interval 100
trigger 0100
trigger 0100
trigger 600603010101
send 01000A995080CA00FE02DF2600
interval 100
trigger 0100
trigger 0100
trigger 600603010101
send 01000A995080CA00FE02DF2600
interval 100
trigger 0100
trigger 600603010101
send 01000A995080CA00FE02DF2600
interval 100
interval 50
send 01000799500170800100^M
# HCI SMX wired APDU: data exchange
# APDU: 0170800100
# MANAGE CHANNEL
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 01000499509000 HCI SMX wired APDU: data exchange
# APDU: 9000
# I - Command successfully executed (OK).
send 220302C001^M
# -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply always On
# 42030100
# 0100029961 HCI SMX wired APDU: end of APDU transfer
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>

View File

@@ -1,152 +0,0 @@
reset 1
interval 50
#flushing i2c buffer
send 20000100^M
send 20000100^M
send 20000100^M
send 20000100^M
# -=(CORE_RESET_CMD)=- Keep Configuration
# 40000100
# 60000A020020040500A4011007
# <<CORE_RESET_NTF>> CORE_RESET_CMD received
# NCI RF Configuration has been kept NCI 2.0 Model ID:00 HW ID:A4 FW:01.10.07
send 2001020000
# -=(CORE_INIT_CMD)=- NCI2.0
# 400120001A3E0600010604FFFF01FF0008000001010002000301018000820083008400
send 20000100^M
# -=(CORE_RESET_CMD)=- Keep Configuration
# 40000100^M
# 60000A020020040500A4011007^M<<CORE_RESET_NTF>> CORE_RESET_CMD received
# NCI RF Configuration has been kept^MNCI 2.0^MModel ID:00 HW ID:A4 FW:01.10.07
send 2001020000^M
# -=(CORE_INIT_CMD)=- NCI2.0
# 400120001A3E0600010604FFFF01FF0008000001010002000301018000820083008400^M
send 2F0200^M
# -=(NCI_PROPRIETARY_ACT_CMD)=-
# 4F02050000010AE3
send 2F000101^M
# -=(CORE_SET_POWER_MODE_CMD)=- Standby Mode enabled
# 4F000100
send 220000^M
# -=(NFCEE_DISCOVER_CMD)=-
# 4200020003^M3 NFCEE found
# 6200088001000103010200^M<<NFCEE_DISCOVER_NTF>> 80 disabled
# Host ID:02
# NFCC has no control of the NFCEE power supply
# 6200088101000103018100^M<<NFCEE_DISCOVER_NTF>> 81 disabled
# Host ID:81
# NFCC has no control of the NFCEE power supply
# 620008C00100010301C001^M<<NFCEE_DISCOVER_NTF>> C0 disabled
# Host ID:C0
# NFCC has control of the NFCEE power supply
send 010003810201
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 01000A818046F7656673F76566[1;35m HCI admin: any ok
# 010007810103028182C0[1;35m HCI admin: set whitelist
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 0100028180[1;35m HCI admin: any ok
send 2201028001^M
# -=(NFCEE_MODE_SET_CMD)=- enabled 80
# 42010100
# 62010103^MOUPS! status failed
send 010003810204
# HCI admin: get host list
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 010003818000 HCI admin: any ok
send 2201028101^M
# -=(NFCEE_MODE_SET_CMD)=- enabled 81
# 42010100
# 62010103^MOUPS! status failed
send 010003810204
# HCI admin: get host list
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 010003818000 HCI admin: any ok
send 220102C001^M
# -=(NFCEE_MODE_SET_CMD)=- enabled C0
# 42010100
# 610A06010003C08004^M<<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Apl-IsoDep
# 62010100^M<<NFCEE_MODE_SET_NTF>>
send 010003810204
# HCI admin: get host list
# 610A06010003C08104^M<<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Bpl-IsoDep
# 010004818000C0 HCI admin: any ok
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 610A06010003C08203^M<<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Fpl-T3T
send 21012400075202C0394103C03B04010300010301030001050003C03B000003C03B010003C03B02^M
# -=(RF_SET_LISTEN_MODE_ROUTING_CMD)=-
# Power state: RFU | RFU | Sub3 | Sub2 | Sub1 | BatOff | SwOff | SwOn
# Sub1: No Screen Unlocked, Sub2: Screen Locked, Sub3: No Screen Locked
# AID {Blocked, Prefix} [Route:C0, Power:39, AID:*]
# Proto {Blocked} [Route:C0, Power:3B, Proto:IsoDep]
# Proto [Route:00, Power:01, Proto:T3T]
# Proto [Route:00, Power:01, Proto:NfcDep]
# Techo [Route:C0, Power:3B, Techno:A]
# Techo [Route:C0, Power:3B, Techno:B]
# Techo [Route:C0, Power:3B, Techno:F]
# 41010100
send 21030703800181018201^M
# -=([1;32mRF_DISCOVER_CMD)=-
# Apl Bpl Fpl
# 41030100
send 20090100^M
# -=(CORE_SET_POWER_SUB_STATE_CMD)=- Screen On Unlocked
# 40090100
send 2103150A0001010102010301800181018201830106017001^M
# -=([1;32mRF_DISCOVER_CMD)=-
# App Bpp Fpp Aap Apl Bpl Fpl Aal 15693pp Koviopp
# 41030100
# use dwp
send 220302C003^M
# -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply and link always On
# 42030100
send 220102C001^M
# -=(NFCEE_MODE_SET_CMD)=- enabled C0
# 42010100
# 62010100^M<<NFCEE_MODE_SET_NTF>>
interval 100
send 01000799500070000001
# HCI SMX wired APDU: data exchange
# APDU: 0070000001
# MANAGE CHANNEL
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 0100059950019000 HCI SMX wired APDU: data exchange
# send 010010995001A4040009A00000015141434C00^M
# HCI SMX wired APDU: data exchange
# APDU: 01A4040009A00000015141434C00
# SELECT ARA-M
# select ISD
send 01000F995000A4040008A000000151000000
# get CPLC
trigger 01003199509F7F2A
send 010007995080CA9F7F00
interval 50
send 01000799500170800100^M
# HCI SMX wired APDU: data exchange
# APDU: 0170800100
# MANAGE CHANNEL
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 01000499509000 HCI SMX wired APDU: data exchange
# APDU: 9000
# I - Command successfully executed (OK).
send 220302C001^M
# -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply always On
# 42030100
# 0100029961 HCI SMX wired APDU: end of APDU transfer
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>

View File

@@ -1,167 +0,0 @@
reset 1
interval 50
#flushing i2c buffer
send 20000100
send 20000100
send 20000100
send 20000100
# -=(CORE_RESET_CMD)=- Keep Configuration
# 40000100
# 60000A020020040500A4011007
# <<CORE_RESET_NTF>> CORE_RESET_CMD received
# NCI RF Configuration has been kept NCI 2.0 Model ID:00 HW ID:A4 FW:01.10.07
send 2001020000
# -=(CORE_INIT_CMD)=- NCI2.0
# 400120001A3E0600010604FFFF01FF0008000001010002000301018000820083008400
send 20000100
# -=(CORE_RESET_CMD)=- Keep Configuration
# 40000100
# 60000A020020040500A4011007<<CORE_RESET_NTF>> CORE_RESET_CMD received
# NCI RF Configuration has been keptNCI 2.0Model ID:00 HW ID:A4 FW:01.10.07
send 2001020000
# -=(CORE_INIT_CMD)=- NCI2.0
# 400120001A3E0600010604FFFF01FF0008000001010002000301018000820083008400
send 2F0200
# -=(NCI_PROPRIETARY_ACT_CMD)=-
# 4F02050000010AE3
send 2F000101
# -=(CORE_SET_POWER_MODE_CMD)=- Standby Mode enabled
# 4F000100
send 20021204A0EC0101A0ED0101A0070101A047020027
# SWP_INT1_EN_CFG:01 SWP_INT2_EN_CFG:01 VEN_CFG:01 GT_NFC-AP_CFG:0027
send 220000
# -=(NFCEE_DISCOVER_CMD)=-
# 42000200033 NFCEE found
# 6200088001000103010200<<NFCEE_DISCOVER_NTF>> 80 disabled
# Host ID:02
# NFCC has no control of the NFCEE power supply
# 6200088101000103018100<<NFCEE_DISCOVER_NTF>> 81 disabled
# Host ID:81
# NFCC has no control of the NFCEE power supply
# 620008C00100010301C001<<NFCEE_DISCOVER_NTF>> C0 disabled
# Host ID:C0
# NFCC has control of the NFCEE power supply
send 0100028103 HCI admin: open
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 0100028180 HCI admin: any ok
send 01000B8101016E0A71666A0A7166 HCI admin: set session id
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 0100028180 HCI admin: any ok
send 010007810103028182C0 HCI admin: set whitelist
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 0100028180 HCI admin: any ok
send 010003810204 HCI admin: get host list
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 010003818000 HCI admin: any ok
send 220302C003 -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply and link always On
# 42030100
send 220102C001 -=(NFCEE_MODE_SET_CMD)=- enabled C0
# 42010100
# 620202C001 <<NFCEE_STATUS_NTF>> C0 Initialization sequence started
# 610A06010003C08004 <<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Apl-IsoDep
# 610A06010003C08104 <<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Bpl-IsoDep
# 0100078112C041014116 HCI admin: pipe created 16 (eSE connectivity) from C0 (41) to 01 (41)
send 0100028180 HCI admin: any ok
# 610A06010003C08203 <<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Fpl-T3T
# 0100029603 HCI eSE connectivity: open
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
send 010003968000 HCI eSE connectivity: any ok
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 620202C002 <<NFCEE_STATUS_NTF>> C0 Initialization sequence completed
# 62010100 <<NFCEE_MODE_SET_NTF>>
send 010003810204 HCI admin: get host list
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 010004818000C0 HCI admin: any ok
send 20030502A023A022 -=(CORE_GET_CONFIG_CMD)=-
# 40030A0002A0230100A0220101
# ?A023?:00 ?A022?:01
send 010005811011C030 HCI admin: create pipe from (11) to C0 (30)
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 01000781800111C03019 HCI admin: any ok
send 0100029903 HCI eSE wired APDU: open
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 010003998000 HCI eSE wired APDU: any ok
send 010003990201 HCI eSE wired APDU: get param:01
# 01001699523B8F80014A434F50352E312052312E30302E3140 HCI eSE wired APDU: transaction
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 01000499808000 HCI eSE wired APDU: any ok
send 010003990202 HCI eSE wired APDU: get param:02
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 010004998003E8 HCI eSE wired APDU: any ok
send 220302C001
# NFCEE_POWER_AND_LINK_CNTRL_CMD C0 NFCEE Power supply always On
send 21030703800181018201
# -=([1;32mRF_DISCOVER_CMD)=-
# Apl Bpl Fpl
# 41030100
send 20090100^M
# -=(CORE_SET_POWER_SUB_STATE_CMD)=- Screen On Unlocked
# 40090100
send 2103150A0001010102010301800181018201830106017001^M
# -=([1;32mRF_DISCOVER_CMD)=-
# App Bpp Fpp Aap Apl Bpl Fpl Aal 15693pp Koviopp
# 41030100
# use dwp
send 220302C003
# -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply and link always On
# 42030100
send 220102C001
# -=(NFCEE_MODE_SET_CMD)=- enabled C0
# 42010100
# 62010100<<NFCEE_MODE_SET_NTF>>
interval 100
send 01000799500070000001
# HCI SMX wired APDU: data exchange
# APDU: 0070000001
# MANAGE CHANNEL
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 0100059950019000 HCI SMX wired APDU: data exchange
# send 010010995001A4040009A00000015141434C00^M
# HCI SMX wired APDU: data exchange
# APDU: 01A4040009A00000015141434C00
# SELECT ARA-M
# ESE Attributes
# select ISD
send 01000F995000A4040008A000000151000000
# get CPLC
# send 010007995080CA9F7F00
# get Free
# send 01000A995080CA00FE02DF2500
# get Keyset
# send 010007995080CA00E000
# get Fabkey
trigger 01000D9950FE07DF23
trigger 600603010101
send 01000A995080CA00FE02DF2300
interval 50
send 01000799500170800100^M
# HCI SMX wired APDU: data exchange
# APDU: 0170800100
# MANAGE CHANNEL
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 01000499509000 HCI SMX wired APDU: data exchange
# APDU: 9000
# I - Command successfully executed (OK).
send 220302C001^M
# -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply always On
# 42030100
# 0100029961 HCI SMX wired APDU: end of APDU transfer
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>

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@@ -1,153 +0,0 @@
reset 1
interval 50
#flushing i2c buffer
send 20000100
send 20000100
send 20000100
send 20000100
# -=(CORE_RESET_CMD)=- Keep Configuration
# 40000100
# 60000A020020040500A4011007
# <<CORE_RESET_NTF>> CORE_RESET_CMD received
# NCI RF Configuration has been kept NCI 2.0 Model ID:00 HW ID:A4 FW:01.10.07
send 2001020000
# -=(CORE_INIT_CMD)=- NCI2.0
# 400120001A3E0600010604FFFF01FF0008000001010002000301018000820083008400
send 20000100
# -=(CORE_RESET_CMD)=- Keep Configuration
# 40000100
# 60000A020020040500A4011007<<CORE_RESET_NTF>> CORE_RESET_CMD received
# NCI RF Configuration has been keptNCI 2.0Model ID:00 HW ID:A4 FW:01.10.07
send 2001020000
# -=(CORE_INIT_CMD)=- NCI2.0
# 400120001A3E0600010604FFFF01FF0008000001010002000301018000820083008400
send 2F0200
# -=(NCI_PROPRIETARY_ACT_CMD)=-
# 4F02050000010AE3
send 2F000101
# -=(CORE_SET_POWER_MODE_CMD)=- Standby Mode enabled
# 4F000100
send 20021204A0EC0101A0ED0101A0070101A047020027
# SWP_INT1_EN_CFG:01 SWP_INT2_EN_CFG:01 VEN_CFG:01 GT_NFC-AP_CFG:0027
send 220000
# -=(NFCEE_DISCOVER_CMD)=-
# 42000200033 NFCEE found
# 6200088001000103010200<<NFCEE_DISCOVER_NTF>> 80 disabled
# Host ID:02
# NFCC has no control of the NFCEE power supply
# 6200088101000103018100<<NFCEE_DISCOVER_NTF>> 81 disabled
# Host ID:81
# NFCC has no control of the NFCEE power supply
# 620008C00100010301C001<<NFCEE_DISCOVER_NTF>> C0 disabled
# Host ID:C0
# NFCC has control of the NFCEE power supply
send 0100028103 HCI admin: open
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 0100028180 HCI admin: any ok
send 01000B8101016E0A71666A0A7166 HCI admin: set session id
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 0100028180 HCI admin: any ok
send 010007810103028182C0 HCI admin: set whitelist
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 0100028180 HCI admin: any ok
send 010003810204 HCI admin: get host list
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 010003818000 HCI admin: any ok
send 220302C003 -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply and link always On
# 42030100
send 220102C001 -=(NFCEE_MODE_SET_CMD)=- enabled C0
# 42010100
# 620202C001 <<NFCEE_STATUS_NTF>> C0 Initialization sequence started
# 610A06010003C08004 <<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Apl-IsoDep
# 610A06010003C08104 <<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Bpl-IsoDep
# 0100078112C041014116 HCI admin: pipe created 16 (eSE connectivity) from C0 (41) to 01 (41)
send 0100028180 HCI admin: any ok
# 610A06010003C08203 <<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Fpl-T3T
# 0100029603 HCI eSE connectivity: open
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
send 010003968000 HCI eSE connectivity: any ok
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 620202C002 <<NFCEE_STATUS_NTF>> C0 Initialization sequence completed
# 62010100 <<NFCEE_MODE_SET_NTF>>
send 010003810204 HCI admin: get host list
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 010004818000C0 HCI admin: any ok
send 20030502A023A022 -=(CORE_GET_CONFIG_CMD)=-
# 40030A0002A0230100A0220101
# ?A023?:00 ?A022?:01
send 010005811011C030 HCI admin: create pipe from (11) to C0 (30)
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 01000781800111C03019 HCI admin: any ok
send 0100029903 HCI eSE wired APDU: open
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 010003998000 HCI eSE wired APDU: any ok
send 010003990201 HCI eSE wired APDU: get param:01
# 01001699523B8F80014A434F50352E312052312E30302E3140 HCI eSE wired APDU: transaction
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 01000499808000 HCI eSE wired APDU: any ok
send 010003990202 HCI eSE wired APDU: get param:02
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 010004998003E8 HCI eSE wired APDU: any ok
send 220302C001
# NFCEE_POWER_AND_LINK_CNTRL_CMD C0 NFCEE Power supply always On
send 21030703800181018201
# -=([1;32mRF_DISCOVER_CMD)=-
# Apl Bpl Fpl
# 41030100
# use dwp
send 220302C003
# -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply and link always On
# 42030100
send 220102C001
# -=(NFCEE_MODE_SET_CMD)=- enabled C0
# 42010100
# 62010100<<NFCEE_MODE_SET_NTF>>
interval 100
send 01000799500070000001
# HCI SMX wired APDU: data exchange
# APDU: 0070000001
# MANAGE CHANNEL
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 0100059950019000 HCI SMX wired APDU: data exchange
# send 010010995001A4040009A00000015141434C00^M
# HCI SMX wired APDU: data exchange
# APDU: 01A4040009A00000015141434C00
# SELECT ARA-M
# ESE Attributes
# select ISD
send 01000F995000A4040008A000000151000000
# get CPLC
# send 010007995080CA9F7F00
# get Free
trigger 01003F9950FE39DF25
trigger 600603010101
send 01000A995080CA00FE02DF2500
interval 50
send 01000799500170800100^M
# HCI SMX wired APDU: data exchange
# APDU: 0170800100
# MANAGE CHANNEL
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 01000499509000 HCI SMX wired APDU: data exchange
# APDU: 9000
# I - Command successfully executed (OK).
send 220302C001^M
# -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply always On
# 42030100
# 0100029961 HCI SMX wired APDU: end of APDU transfer
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>

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@@ -1,156 +0,0 @@
reset 1
interval 50
#flushing i2c buffer
send 20000100
send 20000100
send 20000100
send 20000100
# -=(CORE_RESET_CMD)=- Keep Configuration
# 40000100
# 60000A020020040500A4011007
# <<CORE_RESET_NTF>> CORE_RESET_CMD received
# NCI RF Configuration has been kept NCI 2.0 Model ID:00 HW ID:A4 FW:01.10.07
send 2001020000
# -=(CORE_INIT_CMD)=- NCI2.0
# 400120001A3E0600010604FFFF01FF0008000001010002000301018000820083008400
send 20000100
# -=(CORE_RESET_CMD)=- Keep Configuration
# 40000100
# 60000A020020040500A4011007<<CORE_RESET_NTF>> CORE_RESET_CMD received
# NCI RF Configuration has been keptNCI 2.0Model ID:00 HW ID:A4 FW:01.10.07
send 2001020000
# -=(CORE_INIT_CMD)=- NCI2.0
# 400120001A3E0600010604FFFF01FF0008000001010002000301018000820083008400
send 2F0200
# -=(NCI_PROPRIETARY_ACT_CMD)=-
# 4F02050000010AE3
send 2F000101
# -=(CORE_SET_POWER_MODE_CMD)=- Standby Mode enabled
# 4F000100
send 20021204A0EC0101A0ED0101A0070101A047020027
# SWP_INT1_EN_CFG:01 SWP_INT2_EN_CFG:01 VEN_CFG:01 GT_NFC-AP_CFG:0027
send 220000
# -=(NFCEE_DISCOVER_CMD)=-
# 42000200033 NFCEE found
# 6200088001000103010200<<NFCEE_DISCOVER_NTF>> 80 disabled
# Host ID:02
# NFCC has no control of the NFCEE power supply
# 6200088101000103018100<<NFCEE_DISCOVER_NTF>> 81 disabled
# Host ID:81
# NFCC has no control of the NFCEE power supply
# 620008C00100010301C001<<NFCEE_DISCOVER_NTF>> C0 disabled
# Host ID:C0
# NFCC has control of the NFCEE power supply
send 0100028103 HCI admin: open
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 0100028180 HCI admin: any ok
send 01000B8101016E0A71666A0A7166 HCI admin: set session id
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 0100028180 HCI admin: any ok
send 010007810103028182C0 HCI admin: set whitelist
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 0100028180 HCI admin: any ok
send 010003810204 HCI admin: get host list
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 010003818000 HCI admin: any ok
send 220302C003 -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply and link always On
# 42030100
send 220102C001 -=(NFCEE_MODE_SET_CMD)=- enabled C0
# 42010100
# 620202C001 <<NFCEE_STATUS_NTF>> C0 Initialization sequence started
# 610A06010003C08004 <<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Apl-IsoDep
# 610A06010003C08104 <<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Bpl-IsoDep
# 0100078112C041014116 HCI admin: pipe created 16 (eSE connectivity) from C0 (41) to 01 (41)
send 0100028180 HCI admin: any ok
# 610A06010003C08203 <<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Fpl-T3T
# 0100029603 HCI eSE connectivity: open
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
send 010003968000 HCI eSE connectivity: any ok
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 620202C002 <<NFCEE_STATUS_NTF>> C0 Initialization sequence completed
# 62010100 <<NFCEE_MODE_SET_NTF>>
send 010003810204 HCI admin: get host list
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 010004818000C0 HCI admin: any ok
send 20030502A023A022 -=(CORE_GET_CONFIG_CMD)=-
# 40030A0002A0230100A0220101
# ?A023?:00 ?A022?:01
send 010005811011C030 HCI admin: create pipe from (11) to C0 (30)
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 01000781800111C03019 HCI admin: any ok
send 0100029903 HCI eSE wired APDU: open
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 010003998000 HCI eSE wired APDU: any ok
send 010003990201 HCI eSE wired APDU: get param:01
# 01001699523B8F80014A434F50352E312052312E30302E3140 HCI eSE wired APDU: transaction
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 01000499808000 HCI eSE wired APDU: any ok
send 010003990202 HCI eSE wired APDU: get param:02
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 010004998003E8 HCI eSE wired APDU: any ok
send 220302C001
# NFCEE_POWER_AND_LINK_CNTRL_CMD C0 NFCEE Power supply always On
send 21030703800181018201
# -=([1;32mRF_DISCOVER_CMD)=-
# Apl Bpl Fpl
# 41030100
# use dwp
send 220302C003
# -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply and link always On
# 42030100
send 220102C001
# -=(NFCEE_MODE_SET_CMD)=- enabled C0
# 42010100
# 62010100<<NFCEE_MODE_SET_NTF>>
interval 100
send 01000799500070000001
# HCI SMX wired APDU: data exchange
# APDU: 0070000001
# MANAGE CHANNEL
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 0100059950019000 HCI SMX wired APDU: data exchange
# send 010010995001A4040009A00000015141434C00^M
# HCI SMX wired APDU: data exchange
# APDU: 01A4040009A00000015141434C00
# SELECT ARA-M
# ESE Attributes
# select ISD
send 01000F995000A4040008A000000151000000
# get CPLC
# send 010007995080CA9F7F00
# get Free
# send 01000A995080CA00FE02DF2500
# get Keyset
# 01002A9950E024C00401308810C00402308810C00403308810C00401208010C00402208010C004032080109000
trigger 0100
trigger 600603010101
send 010007995080CA00E000
interval 50
send 01000799500170800100^M
# HCI SMX wired APDU: data exchange
# APDU: 0170800100
# MANAGE CHANNEL
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 01000499509000 HCI SMX wired APDU: data exchange
# APDU: 9000
# I - Command successfully executed (OK).
send 220302C001^M
# -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply always On
# 42030100
# 0100029961 HCI SMX wired APDU: end of APDU transfer
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>

View File

@@ -1,138 +0,0 @@
reset 1
interval 50
#flushing i2c buffer
send 20000100^M
send 20000100^M
send 20000100^M
send 20000100^M
# -=(CORE_RESET_CMD)=- Keep Configuration
# 40000100
# 60000A020020040500A4011007
# <<CORE_RESET_NTF>> CORE_RESET_CMD received
# NCI RF Configuration has been kept NCI 2.0 Model ID:00 HW ID:A4 FW:01.10.07
send 2001020000
# -=(CORE_INIT_CMD)=- NCI2.0
# 400120001A3E0600010604FFFF01FF0008000001010002000301018000820083008400
send 20000100^M
# -=(CORE_RESET_CMD)=- Keep Configuration
# 40000100^M
# 60000A020020040500A4011007^M<<CORE_RESET_NTF>> CORE_RESET_CMD received
# NCI RF Configuration has been kept^MNCI 2.0^MModel ID:00 HW ID:A4 FW:01.10.07
send 2001020000^M
# -=(CORE_INIT_CMD)=- NCI2.0
# 400120001A3E0600010604FFFF01FF0008000001010002000301018000820083008400^M
send 2F0200^M
# -=(NCI_PROPRIETARY_ACT_CMD)=-
# 4F02050000010AE3
send 2F000101^M
# -=(CORE_SET_POWER_MODE_CMD)=- Standby Mode enabled
# 4F000100
send 220000^M
# -=(NFCEE_DISCOVER_CMD)=-
# 4200020003^M3 NFCEE found
# 6200088001000103010200^M<<NFCEE_DISCOVER_NTF>> 80 disabled
# Host ID:02
# NFCC has no control of the NFCEE power supply
# 6200088101000103018100^M<<NFCEE_DISCOVER_NTF>> 81 disabled
# Host ID:81
# NFCC has no control of the NFCEE power supply
# 620008C00100010301C001^M<<NFCEE_DISCOVER_NTF>> C0 disabled
# Host ID:C0
# NFCC has control of the NFCEE power supply
send 010003810201
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 01000A818046F7656673F76566[1;35m HCI admin: any ok
# 010007810103028182C0[1;35m HCI admin: set whitelist
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 0100028180[1;35m HCI admin: any ok
send 2201028001^M
# -=(NFCEE_MODE_SET_CMD)=- enabled 80
# 42010100
# 62010103^MOUPS! status failed
send 010003810204
# HCI admin: get host list
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 010003818000 HCI admin: any ok
send 2201028101^M
# -=(NFCEE_MODE_SET_CMD)=- enabled 81
# 42010100
# 62010103^MOUPS! status failed
send 010003810204
# HCI admin: get host list
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 010003818000 HCI admin: any ok
send 220102C001^M
# -=(NFCEE_MODE_SET_CMD)=- enabled C0
# 42010100
# 610A06010003C08004^M<<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Apl-IsoDep
# 62010100^M<<NFCEE_MODE_SET_NTF>>
send 010003810204
# HCI admin: get host list
# 610A06010003C08104^M<<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Bpl-IsoDep
# 010004818000C0 HCI admin: any ok
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 610A06010003C08203^M<<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Fpl-T3T
send 21012400075202C0394103C03B04010300010301030001050003C03B000003C03B010003C03B02^M
# -=(RF_SET_LISTEN_MODE_ROUTING_CMD)=-
# Power state: RFU | RFU | Sub3 | Sub2 | Sub1 | BatOff | SwOff | SwOn
# Sub1: No Screen Unlocked, Sub2: Screen Locked, Sub3: No Screen Locked
# AID {Blocked, Prefix} [Route:C0, Power:39, AID:*]
# Proto {Blocked} [Route:C0, Power:3B, Proto:IsoDep]
# Proto [Route:00, Power:01, Proto:T3T]
# Proto [Route:00, Power:01, Proto:NfcDep]
# Techo [Route:C0, Power:3B, Techno:A]
# Techo [Route:C0, Power:3B, Techno:B]
# Techo [Route:C0, Power:3B, Techno:F]
# 41010100
send 21030703800181018201^M
# -=([1;32mRF_DISCOVER_CMD)=-
# Apl Bpl Fpl
# 41030100
send 20090100^M
# -=(CORE_SET_POWER_SUB_STATE_CMD)=- Screen On Unlocked
# 40090100
send 2103150A0001010102010301800181018201830106017001^M
# -=([1;32mRF_DISCOVER_CMD)=-
# App Bpp Fpp Aap Apl Bpl Fpl Aal 15693pp Koviopp
# 41030100
# use dwp
send 220302C003^M
# -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply and link always On
# 42030100
send 220102C001^M
# -=(NFCEE_MODE_SET_CMD)=- enabled C0
# 42010100
# 62010100^M<<NFCEE_MODE_SET_NTF>>
interval 100
send 010016995000A404000EA00000039654540000000140010100
# HCI SMX wired APDU: data exchange
# APDU: 0070000001
# MANAGE CHANNEL
interval 100
#01000F9950002608E56461747C13709F9000
trigger 01000F995000
send 010090995000D6000089400B0400000FF881803ED7447EAD8DFBE0D6847323766622E08F0181C29007943FE2CBE783605A516E4C041E93480F6FAA6EE79214CE864A6274AC25BDD76AC6411827426F17984F30811BC69642FA1D734F581ACC9B705B74E638036191D081ECE4B7F826ED89B3FB90536414586E097192EC11A1BDE3711A0B38B16D4F9210BD3DAA62B0121C4B86
# HCI eSE wired APDU: data exchange
# HCI eSE wired APDU: data exchange
#01000F99500027082747A0121EDABB639000
interval 100
trigger 01000F995000
send 01008E995000D6000087404A0260208180C438A987E3DF3D040B1BA5C7A3D352C4397E614FB271DBE957333B4B3C14FB7F0DBAEFD47F49DFDC222EBDEAA8F3D7944EA56FD99BE463D37893C3948140509ECAB9A7B5F908CEC7436A67CD936DE7A67BF0EC684FE6DF691702C113C818E354607E3E1C956A443EF3C584A2E7EF59B54981E79FC2A53DE923BD186421C00FC3
interval 100
send 220302C001^M
# -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply always On
# 42030100
# 0100029961 HCI SMX wired APDU: end of APDU transfer
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>

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@@ -1,136 +0,0 @@
reset 1
interval 50
#flushing i2c buffer
send 20000100^M
send 20000100^M
send 20000100^M
send 20000100^M
# -=(CORE_RESET_CMD)=- Keep Configuration
# 40000100
# 60000A020020040500A4011007
# <<CORE_RESET_NTF>> CORE_RESET_CMD received
# NCI RF Configuration has been kept NCI 2.0 Model ID:00 HW ID:A4 FW:01.10.07
send 2001020000
# -=(CORE_INIT_CMD)=- NCI2.0
# 400120001A3E0600010604FFFF01FF0008000001010002000301018000820083008400
send 20000100^M
# -=(CORE_RESET_CMD)=- Keep Configuration
# 40000100^M
# 60000A020020040500A4011007^M<<CORE_RESET_NTF>> CORE_RESET_CMD received
# NCI RF Configuration has been kept^MNCI 2.0^MModel ID:00 HW ID:A4 FW:01.10.07
send 2001020000^M
# -=(CORE_INIT_CMD)=- NCI2.0
# 400120001A3E0600010604FFFF01FF0008000001010002000301018000820083008400^M
send 2F0200^M
# -=(NCI_PROPRIETARY_ACT_CMD)=-
# 4F02050000010AE3
send 2F000101^M
# -=(CORE_SET_POWER_MODE_CMD)=- Standby Mode enabled
# 4F000100
send 220000^M
# -=(NFCEE_DISCOVER_CMD)=-
# 4200020003^M3 NFCEE found
# 6200088001000103010200^M<<NFCEE_DISCOVER_NTF>> 80 disabled
# Host ID:02
# NFCC has no control of the NFCEE power supply
# 6200088101000103018100^M<<NFCEE_DISCOVER_NTF>> 81 disabled
# Host ID:81
# NFCC has no control of the NFCEE power supply
# 620008C00100010301C001^M<<NFCEE_DISCOVER_NTF>> C0 disabled
# Host ID:C0
# NFCC has control of the NFCEE power supply
send 010003810201
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 01000A818046F7656673F76566[1;35m HCI admin: any ok
# 010007810103028182C0[1;35m HCI admin: set whitelist
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 0100028180[1;35m HCI admin: any ok
send 2201028001^M
# -=(NFCEE_MODE_SET_CMD)=- enabled 80
# 42010100
# 62010103^MOUPS! status failed
send 010003810204
# HCI admin: get host list
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 010003818000 HCI admin: any ok
send 2201028101^M
# -=(NFCEE_MODE_SET_CMD)=- enabled 81
# 42010100
# 62010103^MOUPS! status failed
send 010003810204
# HCI admin: get host list
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 010003818000 HCI admin: any ok
send 220102C001^M
# -=(NFCEE_MODE_SET_CMD)=- enabled C0
# 42010100
# 610A06010003C08004^M<<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Apl-IsoDep
# 62010100^M<<NFCEE_MODE_SET_NTF>>
send 010003810204
# HCI admin: get host list
# 610A06010003C08104^M<<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Bpl-IsoDep
# 010004818000C0 HCI admin: any ok
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 610A06010003C08203^M<<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Fpl-T3T
send 21012400075202C0394103C03B04010300010301030001050003C03B000003C03B010003C03B02^M
# -=(RF_SET_LISTEN_MODE_ROUTING_CMD)=-
# Power state: RFU | RFU | Sub3 | Sub2 | Sub1 | BatOff | SwOff | SwOn
# Sub1: No Screen Unlocked, Sub2: Screen Locked, Sub3: No Screen Locked
# AID {Blocked, Prefix} [Route:C0, Power:39, AID:*]
# Proto {Blocked} [Route:C0, Power:3B, Proto:IsoDep]
# Proto [Route:00, Power:01, Proto:T3T]
# Proto [Route:00, Power:01, Proto:NfcDep]
# Techo [Route:C0, Power:3B, Techno:A]
# Techo [Route:C0, Power:3B, Techno:B]
# Techo [Route:C0, Power:3B, Techno:F]
# 41010100
send 21030703800181018201^M
# -=([1;32mRF_DISCOVER_CMD)=-
# Apl Bpl Fpl
# 41030100
send 20090100^M
# -=(CORE_SET_POWER_SUB_STATE_CMD)=- Screen On Unlocked
# 40090100
send 2103150A0001010102010301800181018201830106017001^M
# -=([1;32mRF_DISCOVER_CMD)=-
# App Bpp Fpp Aap Apl Bpl Fpl Aal 15693pp Koviopp
# 41030100
# use dwp
send 220302C003^M
# -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply and link always On
# 42030100
send 220102C001^M
# -=(NFCEE_MODE_SET_CMD)=- enabled C0
# 42010100
# 62010100^M<<NFCEE_MODE_SET_NTF>>
interval 100
send 010016995000A404000EA00000039654540000000140010100
# HCI SMX wired APDU: data exchange
# APDU: 0070000001
# MANAGE CHANNEL
interval 100
trigger 01000F995000
send 010090995000D6000089400B0400000FFC8180204B06DBC1E82A12C441223D5AB17BA3EC6EF62AF4A626A3BFC388C7F6F1EE47BFC86F625DA2FC36AE76FA93AC0806ECC6AF404B48A17D881FD82694BACF27BC8AD840077ECC79778989085B41CA755632D800039E2DC74A50CA5A42519F81708EEE565FB4FEC605C17D280CAF77FB414C82D378E4482AC43670533B4B37E63F
# HCI eSE wired APDU: data exchange
# HCI eSE wired APDU: data exchange
interval 100
trigger 01000F995000
send 01008E995000D6000087404A02602281802D9D8679E8EF140FA3318D3669B0207427DD4071F38CAB94F61655F3759C515A10FE480831289999CB140335202039FE9E5C630EAE8661DD76CE232D19E161AAD41F4707A3C34151B65E7C0084E322EC056A7CD679C8EC116AB6AC27D86EFA4AD49F6E22A4696CD3FCF08D31A36C1C30BC955E829B5CCCD5023F9D9DB97E85B5
interval 100
send 220302C001^M
# -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply always On
# 42030100
# 0100029961 HCI SMX wired APDU: end of APDU transfer
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>

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@@ -1,144 +0,0 @@
reset 1
interval 50
#flushing i2c buffer
send 20000100^M
send 20000100^M
send 20000100^M
send 20000100^M
# -=(CORE_RESET_CMD)=- Keep Configuration
# 40000100
# 60000A020020040500A4011007
# <<CORE_RESET_NTF>> CORE_RESET_CMD received
# NCI RF Configuration has been kept NCI 2.0 Model ID:00 HW ID:A4 FW:01.10.07
send 2001020000
# -=(CORE_INIT_CMD)=- NCI2.0
# 400120001A3E0600010604FFFF01FF0008000001010002000301018000820083008400
send 20000100^M
# -=(CORE_RESET_CMD)=- Keep Configuration
# 40000100^M
# 60000A020020040500A4011007^M<<CORE_RESET_NTF>> CORE_RESET_CMD received
# NCI RF Configuration has been kept^MNCI 2.0^MModel ID:00 HW ID:A4 FW:01.10.07
send 2001020000^M
# -=(CORE_INIT_CMD)=- NCI2.0
# 400120001A3E0600010604FFFF01FF0008000001010002000301018000820083008400^M
send 2F0200^M
# -=(NCI_PROPRIETARY_ACT_CMD)=-
# 4F02050000010AE3
send 2F000101^M
# -=(CORE_SET_POWER_MODE_CMD)=- Standby Mode enabled
# 4F000100
send 220000^M
# -=(NFCEE_DISCOVER_CMD)=-
# 4200020003^M3 NFCEE found
# 6200088001000103010200^M<<NFCEE_DISCOVER_NTF>> 80 disabled
# Host ID:02
# NFCC has no control of the NFCEE power supply
# 6200088101000103018100^M<<NFCEE_DISCOVER_NTF>> 81 disabled
# Host ID:81
# NFCC has no control of the NFCEE power supply
# 620008C00100010301C001^M<<NFCEE_DISCOVER_NTF>> C0 disabled
# Host ID:C0
# NFCC has control of the NFCEE power supply
send 010003810201
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 01000A818046F7656673F76566[1;35m HCI admin: any ok
# 010007810103028182C0[1;35m HCI admin: set whitelist
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 0100028180[1;35m HCI admin: any ok
send 2201028001^M
# -=(NFCEE_MODE_SET_CMD)=- enabled 80
# 42010100
# 62010103^MOUPS! status failed
send 010003810204
# HCI admin: get host list
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 010003818000 HCI admin: any ok
send 2201028101^M
# -=(NFCEE_MODE_SET_CMD)=- enabled 81
# 42010100
# 62010103^MOUPS! status failed
send 010003810204
# HCI admin: get host list
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 010003818000 HCI admin: any ok
send 220102C001^M
# -=(NFCEE_MODE_SET_CMD)=- enabled C0
# 42010100
# 610A06010003C08004^M<<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Apl-IsoDep
# 62010100^M<<NFCEE_MODE_SET_NTF>>
send 010003810204
# HCI admin: get host list
# 610A06010003C08104^M<<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Bpl-IsoDep
# 010004818000C0 HCI admin: any ok
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 610A06010003C08203^M<<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Fpl-T3T
send 21012400075202C0394103C03B04010300010301030001050003C03B000003C03B010003C03B02^M
# -=(RF_SET_LISTEN_MODE_ROUTING_CMD)=-
# Power state: RFU | RFU | Sub3 | Sub2 | Sub1 | BatOff | SwOff | SwOn
# Sub1: No Screen Unlocked, Sub2: Screen Locked, Sub3: No Screen Locked
# AID {Blocked, Prefix} [Route:C0, Power:39, AID:*]
# Proto {Blocked} [Route:C0, Power:3B, Proto:IsoDep]
# Proto [Route:00, Power:01, Proto:T3T]
# Proto [Route:00, Power:01, Proto:NfcDep]
# Techo [Route:C0, Power:3B, Techno:A]
# Techo [Route:C0, Power:3B, Techno:B]
# Techo [Route:C0, Power:3B, Techno:F]
# 41010100
send 21030703800181018201^M
# -=([1;32mRF_DISCOVER_CMD)=-
# Apl Bpl Fpl
# 41030100
send 20090100^M
# -=(CORE_SET_POWER_SUB_STATE_CMD)=- Screen On Unlocked
# 40090100
send 2103150A0001010102010301800181018201830106017001^M
# -=([1;32mRF_DISCOVER_CMD)=-
# App Bpp Fpp Aap Apl Bpl Fpl Aal 15693pp Koviopp
# 41030100
# use dwp
send 220302C003^M
# -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply and link always On
# 42030100
send 220102C001^M
# -=(NFCEE_MODE_SET_CMD)=- enabled C0
# 42010100
# 62010100^M<<NFCEE_MODE_SET_NTF>>
interval 100
send 010016995000A404000EA00000039654540000000140010100
# HCI SMX wired APDU: data exchange
# APDU: 0070000001
# MANAGE CHANNEL
interval 100
trigger 0100169950400B0400000F
send 01008B995000B0000084400B81805E2E32BC07F38EAD7A5A82B7789C35783720E72C1891DF86295A91394A55876580E5E5DF657EDD5B1D5432D36D950DA2D3382F8FCAC9F509E71B1988BDBBDD0159B28564ED195CC5B277726B7A3541A9FB0CD1586BFB8FDE4EC23BAD7D7F075ADCEE3D7DF47B2BFB27EE69E77ADFA59DEB323DD1EE0EAB832B606161F6850E18
# HCI eSE wired APDU: data exchange
# HCI eSE wired APDU: data exchange
interval 100
trigger 0100149950404A0260
send 01008B995000B0000084404A81806E2897ACBB501B87787148679712BAF3CF9E7929E701A474A8B076F5351D3580DA969BEB772E92DD795BD8ACA805192680C99D1DE4B02CA75E2064AF91F5D5146BDC99EA766FA25D7D30E1416840A6F287A569430B7146BF485A4CEFC3EE28EA4021987D7B4EC4645646EFE22359A3354E211FF8A26E4AF21425BB6C8B4134C9
interval 100
send 220302C001^M
# -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply always On
# 42030100
# 0100029961 HCI SMX wired APDU: end of APDU transfer
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>

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@@ -1,163 +0,0 @@
reset 1
interval 50
#flushing i2c buffer
send 20000100
send 20000100
send 20000100
send 20000100
# -=(CORE_RESET_CMD)=- Keep Configuration
# 40000100
# 60000A020020040500A4011007
# <<CORE_RESET_NTF>> CORE_RESET_CMD received
# NCI RF Configuration has been kept NCI 2.0 Model ID:00 HW ID:A4 FW:01.10.07
send 2001020000
# -=(CORE_INIT_CMD)=- NCI2.0
# 400120001A3E0600010604FFFF01FF0008000001010002000301018000820083008400
send 20000100
# -=(CORE_RESET_CMD)=- Keep Configuration
# 40000100
# 60000A020020040500A4011007<<CORE_RESET_NTF>> CORE_RESET_CMD received
# NCI RF Configuration has been keptNCI 2.0Model ID:00 HW ID:A4 FW:01.10.07
send 2001020000
# -=(CORE_INIT_CMD)=- NCI2.0
# 400120001A3E0600010604FFFF01FF0008000001010002000301018000820083008400
send 2F0200
# -=(NCI_PROPRIETARY_ACT_CMD)=-
# 4F02050000010AE3
send 2F000101
# -=(CORE_SET_POWER_MODE_CMD)=- Standby Mode enabled
# 4F000100
send 20021204A0EC0101A0ED0101A0070101A047020027
# SWP_INT1_EN_CFG:01 SWP_INT2_EN_CFG:01 VEN_CFG:01 GT_NFC-AP_CFG:0027
send 220000
# -=(NFCEE_DISCOVER_CMD)=-
# 42000200033 NFCEE found
# 6200088001000103010200<<NFCEE_DISCOVER_NTF>> 80 disabled
# Host ID:02
# NFCC has no control of the NFCEE power supply
# 6200088101000103018100<<NFCEE_DISCOVER_NTF>> 81 disabled
# Host ID:81
# NFCC has no control of the NFCEE power supply
# 620008C00100010301C001<<NFCEE_DISCOVER_NTF>> C0 disabled
# Host ID:C0
# NFCC has control of the NFCEE power supply
send 0100028103 HCI admin: open
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 0100028180 HCI admin: any ok
send 01000B8101016E0A71666A0A7166 HCI admin: set session id
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 0100028180 HCI admin: any ok
send 010007810103028182C0 HCI admin: set whitelist
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 0100028180 HCI admin: any ok
send 010003810204 HCI admin: get host list
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 010003818000 HCI admin: any ok
send 220302C003 -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply and link always On
# 42030100
send 220102C001 -=(NFCEE_MODE_SET_CMD)=- enabled C0
# 42010100
# 620202C001 <<NFCEE_STATUS_NTF>> C0 Initialization sequence started
# 610A06010003C08004 <<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Apl-IsoDep
# 610A06010003C08104 <<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Bpl-IsoDep
# 0100078112C041014116 HCI admin: pipe created 16 (eSE connectivity) from C0 (41) to 01 (41)
send 0100028180 HCI admin: any ok
# 610A06010003C08203 <<RF_NFCEE_DISCOVERY_REQ_NTF>> add:C0-Fpl-T3T
# 0100029603 HCI eSE connectivity: open
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
send 010003968000 HCI eSE connectivity: any ok
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 620202C002 <<NFCEE_STATUS_NTF>> C0 Initialization sequence completed
# 62010100 <<NFCEE_MODE_SET_NTF>>
send 010003810204 HCI admin: get host list
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 010004818000C0 HCI admin: any ok
send 20030502A023A022 -=(CORE_GET_CONFIG_CMD)=-
# 40030A0002A0230100A0220101
# ?A023?:00 ?A022?:01
send 010005811011C030 HCI admin: create pipe from (11) to C0 (30)
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 01000781800111C03019 HCI admin: any ok
send 0100029903 HCI eSE wired APDU: open
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 010003998000 HCI eSE wired APDU: any ok
send 010003990201 HCI eSE wired APDU: get param:01
# 01001699523B8F80014A434F50352E312052312E30302E3140 HCI eSE wired APDU: transaction
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 01000499808000 HCI eSE wired APDU: any ok
send 010003990202 HCI eSE wired APDU: get param:02
# 600603010101 <<CORE_CONN_CREDITS_NTF>>
# 010004998003E8 HCI eSE wired APDU: any ok
send 220302C001
# NFCEE_POWER_AND_LINK_CNTRL_CMD C0 NFCEE Power supply always On
send 21030703800181018201
# -=([1;32mRF_DISCOVER_CMD)=-
# Apl Bpl Fpl
# 41030100
# use dwp
send 220302C003
# -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply and link always On
# 42030100
send 220102C001
# -=(NFCEE_MODE_SET_CMD)=- enabled C0
# 42010100
# 62010100<<NFCEE_MODE_SET_NTF>>
interval 100
send 01000799500070000001
# HCI SMX wired APDU: data exchange
# APDU: 0070000001
# MANAGE CHANNEL
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 0100059950019000 HCI SMX wired APDU: data exchange
# send 010010995001A4040009A00000015141434C00^M
# HCI SMX wired APDU: data exchange
# APDU: 01A4040009A00000015141434C00
# SELECT ARA-M
# ESE Attributes
# select ISD
send 01000F995000A4040008A000000151000000
# get CPLC
# send 010007995080CA9F7F00
# get Free
# send 01000A995080CA00FE02DF2500
# get Keyset
# send 010007995080CA00E000
# get Fabkey
# send 01000A995080CA00FE02DF2300
# get SN
trigger 0100219950FE1BDF2118
trigger 600603010101
send 01000A995080CA00FE02DF2100
interval 50
send 01000799500170800100^M
# HCI SMX wired APDU: data exchange
# APDU: 0170800100
# MANAGE CHANNEL
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>
# 01000499509000 HCI SMX wired APDU: data exchange
# APDU: 9000
# I - Command successfully executed (OK).
send 220302C001^M
# -=(NFCEE_POWER_AND_LINK_CNTRL_CMD)=- C0 NFCEE Power supply always On
# 42030100
# 0100029961 HCI SMX wired APDU: end of APDU transfer
# 600603010101^M<<CORE_CONN_CREDITS_NTF>>

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@@ -1,16 +0,0 @@
reset 0
reset 1
interval 50
#flushing i2c buffer
# core reset
send 20000101
# core init
send 2001020000
# enable standby mode
send 2F000101
# read die-id
trigger 4003150001A00110

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@@ -1,10 +0,0 @@
reset 0
reset 1
interval 50
# core_reset_ntf
trigger 6000
# core_reset_rsp
trigger 40000100
# core reset
send 20000101

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@@ -1,24 +0,0 @@
reset 0
reset 1
interval 50
#flushing i2c buffer
# core reset
send 20000101
# core init
send 2001020000
send 2F0200
trigger 6F3E02
trigger 4F3E01
send 2F3E0100
trigger 6F3E02
trigger 4F3E01
send 2F3E0101
trigger 6F3E02
trigger 4F3E01
send 2F3E0102

Binary file not shown.